Enum InstructionPattern

Source

pub enum InstructionPattern {
Show 67 variants    Any,
    LoadImm {
        reg: Pat<u8>,
        value: Pat<i32>,
    },
    LoadImm64 {
        reg: Pat<u8>,
        value: Pat<u64>,
    },
    Add32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Sub32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Mul32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    DivU32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    DivS32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    RemU32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    RemS32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Add64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Sub64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Mul64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    DivU64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    DivS64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    RemU64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    RemS64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    And {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Or {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    Xor {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    ShloL32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    ShloR32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    SharR32 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    ShloL64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    ShloR64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    SharR64 {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    SetLtU {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    SetLtS {
        dst: Pat<u8>,
        src1: Pat<u8>,
        src2: Pat<u8>,
    },
    SetLtUImm {
        dst: Pat<u8>,
        src: Pat<u8>,
        value: Pat<i32>,
    },
    SetLtSImm {
        dst: Pat<u8>,
        src: Pat<u8>,
        value: Pat<i32>,
    },
    Jump {
        offset: Pat<i32>,
    },
    JumpInd {
        reg: Pat<u8>,
        offset: Pat<i32>,
    },
    AddImm32 {
        dst: Pat<u8>,
        src: Pat<u8>,
        value: Pat<i32>,
    },
    AddImm64 {
        dst: Pat<u8>,
        src: Pat<u8>,
        value: Pat<i32>,
    },
    BranchLtU {
        reg1: Pat<u8>,
        reg2: Pat<u8>,
        offset: Pat<i32>,
    },
    BranchGeU {
        reg1: Pat<u8>,
        reg2: Pat<u8>,
        offset: Pat<i32>,
    },
    BranchEqImm {
        reg: Pat<u8>,
        value: Pat<i32>,
        offset: Pat<i32>,
    },
    BranchNeImm {
        reg: Pat<u8>,
        value: Pat<i32>,
        offset: Pat<i32>,
    },
    BranchGeSImm {
        reg: Pat<u8>,
        value: Pat<i32>,
        offset: Pat<i32>,
    },
    LoadIndU8 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    LoadIndI8 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    LoadIndU16 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    LoadIndI16 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    LoadIndU32 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    LoadIndU64 {
        dst: Pat<u8>,
        base: Pat<u8>,
        offset: Pat<i32>,
    },
    StoreIndU8 {
        base: Pat<u8>,
        src: Pat<u8>,
        offset: Pat<i32>,
    },
    StoreIndU16 {
        base: Pat<u8>,
        src: Pat<u8>,
        offset: Pat<i32>,
    },
    StoreIndU32 {
        base: Pat<u8>,
        src: Pat<u8>,
        offset: Pat<i32>,
    },
    StoreIndU64 {
        base: Pat<u8>,
        src: Pat<u8>,
        offset: Pat<i32>,
    },
    CountSetBits32 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    CountSetBits64 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    LeadingZeroBits32 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    LeadingZeroBits64 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    TrailingZeroBits32 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    TrailingZeroBits64 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    SignExtend8 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    SignExtend16 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    ZeroExtend16 {
        dst: Pat<u8>,
        src: Pat<u8>,
    },
    CmovIzImm {
        cond: Pat<u8>,
        dst: Pat<u8>,
        value: Pat<i32>,
    },
    CmovNzImm {
        cond: Pat<u8>,
        dst: Pat<u8>,
        value: Pat<i32>,
    },
    StoreImmU8 {
        address: Pat<i32>,
        value: Pat<i32>,
    },
    StoreImmU16 {
        address: Pat<i32>,
        value: Pat<i32>,
    },
    StoreImmU32 {
        address: Pat<i32>,
        value: Pat<i32>,
    },
    StoreImmU64 {
        address: Pat<i32>,
        value: Pat<i32>,
    },
    Trap,
    Fallthrough,
    Ecalli {
        index: Pat<u32>,
    },
}