pub struct Flash<SPI> { /* private fields */ }Expand description
Driver for W25Q-series SPI Flash chips.
Implementations§
Source§impl<SPI: SpiDevice> Flash<SPI>
impl<SPI: SpiDevice> Flash<SPI>
Sourcepub async fn new(spi: SPI) -> Result<Self, Error<SPI::Error>>
pub async fn new(spi: SPI) -> Result<Self, Error<SPI::Error>>
Creates a new W25Q-series flash driver.
Sourcepub async fn read_jedec_id(&mut self) -> Result<JedecId, Error<SPI::Error>>
pub async fn read_jedec_id(&mut self) -> Result<JedecId, Error<SPI::Error>>
Reads the JEDEC manufacturer/device identification.
Sourcepub async fn read_status(&mut self) -> Result<Status, Error<SPI::Error>>
pub async fn read_status(&mut self) -> Result<Status, Error<SPI::Error>>
Reads the status register.
Sourcepub async fn get_device_info(&mut self) -> Result<FlashInfo, Error<SPI::Error>>
pub async fn get_device_info(&mut self) -> Result<FlashInfo, Error<SPI::Error>>
Get the device information.
Sourcepub async fn power_down(&mut self) -> Result<(), Error<SPI::Error>>
pub async fn power_down(&mut self) -> Result<(), Error<SPI::Error>>
Enter power down mode.
Datasheet, 8.2.35: Power-down: Although the standby current during normal operation is relatively low, standby current can be further reduced with the Power-down instruction. The lower power consumption makes the Power-down instruction especially useful for battery powered applications (See ICC1 and ICC2 in AC Characteristics). The instruction is initiated by driving the /CS pin low and shifting the instruction code “B9h” as shown in Figure 44.
The /CS pin must be driven high after the eighth bit has been latched. If this is not done the Power-down instruction will not be executed. After /CS is driven high, the power-down state will entered within the time duration of tDP (See AC Characteristics). While in the power-down state only the Release Power-down / Device ID (ABh) instruction, which restores the device to normal operation, will be recognized. All other instructions are ignored. This includes the Read Status Register instruction, which is always available during normal operation. Ignoring all but one instruction makes the Power Down state a useful condition for securing maximum write protection. The device always powers-up in the normal operation with the standby current of ICC1.
Sourcepub async fn power_up<D: DelayNs>(
&mut self,
delay: &mut D,
) -> Result<(), Error<SPI::Error>>
pub async fn power_up<D: DelayNs>( &mut self, delay: &mut D, ) -> Result<(), Error<SPI::Error>>
Exit power down mode.
Datasheet, 8.2.36: Release Power-down: The Release from Power-down / Device ID instruction is a multi-purpose instruction. It can be used to release the device from the power-down state, or obtain the devices electronic identification (ID) number. To release the device from the power-down state, the instruction is issued by driving the /CS pin low, shifting the instruction code “ABh” and driving /CS high as shown in Figure 45. Release from power-down will take the time duration of tRES1 (See AC Characteristics) before the device will resume normal operation and other instructions are accepted. The /CS pin must remain high during the tRES1 time duration.
Note: must manually delay after running this, IOC
Sourcepub async fn read(
&mut self,
addr: u32,
buf: &mut [u8],
) -> Result<(), Error<SPI::Error>>
pub async fn read( &mut self, addr: u32, buf: &mut [u8], ) -> Result<(), Error<SPI::Error>>
Reads memory into buf, starting at addr.
The read address must be aligned according to the requirements of the actual flash chip. See the datasheet of your specific chip for details.
Address is truncated to 24 bits before being transmitted. See the datasheet of your flash chip to know what happens when the address exceeds the available memory.
Sourcepub async fn erase_sector(&mut self, addr: u32) -> Result<(), Error<SPI::Error>>
pub async fn erase_sector(&mut self, addr: u32) -> Result<(), Error<SPI::Error>>
Erase a sector of memory.
The address must be sector aligned.
Sourcepub async fn write_bytes(
&mut self,
addr: u32,
data: &[u8],
) -> Result<(), Error<SPI::Error>>
pub async fn write_bytes( &mut self, addr: u32, data: &[u8], ) -> Result<(), Error<SPI::Error>>
Program (write) bytes to the memory.
That start address must be page aligned, and for most chips, the bytes being written to must have been erased (see the datasheet of your specific chip for details).