pub enum Op {
Show 49 variants
Mov(Operand, Operand),
Movsx(Operand, Operand),
Str(Operand, Operand, Operand),
Ldd(Operand, Operand, Operand),
Neg(Operand),
Add(Operand, Operand),
Sub(Operand, Operand),
Mul(Operand, Operand),
Mulhi(Operand, Operand),
Imul(Operand, Operand),
Imulhi(Operand, Operand),
Div(Operand, Operand, Operand),
Rem(Operand, Operand, Operand),
Idiv(Operand, Operand, Operand),
Irem(Operand, Operand, Operand),
Popcnt(Operand),
Bsf(Operand),
Bsr(Operand),
Not(Operand),
Shr(Operand, Operand),
Shl(Operand, Operand),
Xor(Operand, Operand),
Or(Operand, Operand),
And(Operand, Operand),
Ror(Operand, Operand),
Rol(Operand, Operand),
Tg(Operand, Operand, Operand),
Tge(Operand, Operand, Operand),
Te(Operand, Operand, Operand),
Tne(Operand, Operand, Operand),
Tl(Operand, Operand, Operand),
Tle(Operand, Operand, Operand),
Tug(Operand, Operand, Operand),
Tuge(Operand, Operand, Operand),
Tul(Operand, Operand, Operand),
Tule(Operand, Operand, Operand),
Ifs(Operand, Operand, Operand),
Js(Operand, Operand, Operand),
Jmp(Operand),
Vexit(Operand),
Vxcall(Operand),
Nop,
Sfence,
Lfence,
Vemit(Operand),
Vpinr(Operand),
Vpinw(Operand),
Vpinrm(Operand, Operand, Operand),
Vpinwm(Operand, Operand, Operand),
}
Expand description
VTIL operator and operands
Variants§
Mov(Operand, Operand)
OP1 = ZX(OP2)
Movsx(Operand, Operand)
OP1 = SX(OP2)
Str(Operand, Operand, Operand)
[OP1+OP2] <= OP3
Ldd(Operand, Operand, Operand)
OP1 <= [OP2+OP3]
Neg(Operand)
OP1 = -OP1
Add(Operand, Operand)
OP1 = OP1 + OP2
Sub(Operand, Operand)
OP1 = OP1 - OP2
Mul(Operand, Operand)
OP1 = OP1 * OP2
Mulhi(Operand, Operand)
OP1 = [OP1 * OP2]>>N
Imul(Operand, Operand)
OP1 = OP1 * OP2 (Signed)
Imulhi(Operand, Operand)
OP1 = [OP1 * OP2]>>N (Signed)
Div(Operand, Operand, Operand)
OP1 = [OP2:OP1] / OP3
Rem(Operand, Operand, Operand)
OP1 = [OP2:OP1] % OP3
Idiv(Operand, Operand, Operand)
OP1 = [OP2:OP1] / OP3 (Signed)
Irem(Operand, Operand, Operand)
OP1 = [OP2:OP1] % OP3 (Signed)
Popcnt(Operand)
OP1 = popcnt OP1
Bsf(Operand)
OP1 = OP1 ? BitScanForward OP1 + 1 : 0
Bsr(Operand)
OP1 = OP1 ? BitScanReverse OP1 + 1 : 0
Not(Operand)
OP1 = ~OP1
Shr(Operand, Operand)
OP1 >>= OP2
Shl(Operand, Operand)
OP1 <<= OP2
Xor(Operand, Operand)
OP1 ^= OP2
Or(Operand, Operand)
OP1 |= OP2
And(Operand, Operand)
OP1 &= OP2
Ror(Operand, Operand)
OP1 = (OP1>>OP2) | (OP1<<(N-OP2))
Rol(Operand, Operand)
OP1 = (OP1<<OP2) | (OP1>>(N-OP2))
Tg(Operand, Operand, Operand)
OP1 = OP2 > OP3
Tge(Operand, Operand, Operand)
OP1 = OP2 >= OP3
Te(Operand, Operand, Operand)
OP1 = OP2 == OP3
Tne(Operand, Operand, Operand)
OP1 = OP2 != OP3
Tl(Operand, Operand, Operand)
OP1 = OP2 < OP3
Tle(Operand, Operand, Operand)
OP1 = OP2 <= OP3
Tug(Operand, Operand, Operand)
OP1 = OP2 <= OP3
Tuge(Operand, Operand, Operand)
OP1 = OP2 u>= OP3
Tul(Operand, Operand, Operand)
OP1 = OP2 u< OP3
Tule(Operand, Operand, Operand)
OP1 = OP2 u<= OP3
Ifs(Operand, Operand, Operand)
OP1 = OP2 ? OP3 : 0
Js(Operand, Operand, Operand)
Jumps to OP1 ? OP2 : OP3, continues virtual execution
Jmp(Operand)
Jumps to OP1, continues virtual execution
Vexit(Operand)
Jumps to OP1, continues real execution
Vxcall(Operand)
Calls into OP1, pauses virtual execution until the call returns
Nop
Placeholder
Sfence
Assumes all memory is read from
Lfence
Assumes all memory is written to
Vemit(Operand)
Emits the opcode as is to the final instruction stream
Vpinr(Operand)
Pins the register for read
Vpinw(Operand)
Pins the register for write
Vpinrm(Operand, Operand, Operand)
Pins the memory location for read, with size = OP3
Vpinwm(Operand, Operand, Operand)
Pins the memory location for write, with size = OP3
Implementations§
Source§impl Op
impl Op
Sourcepub fn operands_mut(&mut self) -> Vec<&mut Operand>
pub fn operands_mut(&mut self) -> Vec<&mut Operand>
Mutable operands for operator
Sourcepub fn is_volatile(&self) -> bool
pub fn is_volatile(&self) -> bool
Returns if the instruction is volatile
Sourcepub fn is_branching(&self) -> bool
pub fn is_branching(&self) -> bool
Returns if the instruction is a branching operation