tmc2209_uart/registers/
factory_conf.rs1use super::{Address, ReadableRegister, Register, WritableRegister};
4
5#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
9#[cfg_attr(feature = "defmt", derive(defmt::Format))]
10pub struct FactoryConf(u32);
11
12impl FactoryConf {
13 pub fn fclktrim(&self) -> u8 {
18 (self.0 & 0x1F) as u8
19 }
20
21 pub fn set_fclktrim(&mut self, value: u8) -> &mut Self {
23 self.0 = (self.0 & !0x1F) | ((value as u32) & 0x1F);
24 self
25 }
26
27 pub fn ottrim(&self) -> u8 {
35 ((self.0 >> 8) & 0x03) as u8
36 }
37
38 pub fn set_ottrim(&mut self, value: u8) -> &mut Self {
40 self.0 = (self.0 & !0x300) | (((value as u32) & 0x03) << 8);
41 self
42 }
43
44 pub fn raw(&self) -> u32 {
46 self.0
47 }
48
49 pub fn from_raw(value: u32) -> Self {
51 Self(value)
52 }
53}
54
55impl Register for FactoryConf {
56 const ADDRESS: Address = Address::FactoryConf;
57}
58
59impl ReadableRegister for FactoryConf {}
60impl WritableRegister for FactoryConf {}
61
62impl From<u32> for FactoryConf {
63 fn from(value: u32) -> Self {
64 Self(value)
65 }
66}
67
68impl From<FactoryConf> for u32 {
69 fn from(reg: FactoryConf) -> u32 {
70 reg.0
71 }
72}