tmc2209_uart/registers/
factory_conf.rs

1//! FACTORY_CONF - Factory configuration register (0x07)
2
3use super::{Address, ReadableRegister, Register, WritableRegister};
4
5/// Factory configuration register.
6///
7/// Contains clock frequency trim and overtemperature settings.
8#[derive(Debug, Clone, Copy, PartialEq, Eq, Default)]
9#[cfg_attr(feature = "defmt", derive(defmt::Format))]
10pub struct FactoryConf(u32);
11
12impl FactoryConf {
13    /// FCLKTRIM value (0-31).
14    ///
15    /// Clock frequency trim. 0 = lowest, 31 = highest frequency.
16    /// **Pre-programmed by factory to 12MHz - do not alter.**
17    pub fn fclktrim(&self) -> u8 {
18        (self.0 & 0x1F) as u8
19    }
20
21    /// Set FCLKTRIM value.
22    pub fn set_fclktrim(&mut self, value: u8) -> &mut Self {
23        self.0 = (self.0 & !0x1F) | ((value as u32) & 0x1F);
24        self
25    }
26
27    /// OTTRIM value (0-3).
28    ///
29    /// Overtemperature threshold selection:
30    /// - 0b00: OT=143°C, OTPW=120°C
31    /// - 0b01: OT=150°C, OTPW=120°C
32    /// - 0b10: OT=150°C, OTPW=143°C
33    /// - 0b11: OT=157°C, OTPW=143°C
34    pub fn ottrim(&self) -> u8 {
35        ((self.0 >> 8) & 0x03) as u8
36    }
37
38    /// Set OTTRIM value.
39    pub fn set_ottrim(&mut self, value: u8) -> &mut Self {
40        self.0 = (self.0 & !0x300) | (((value as u32) & 0x03) << 8);
41        self
42    }
43
44    /// Get the raw register value.
45    pub fn raw(&self) -> u32 {
46        self.0
47    }
48
49    /// Create from raw value.
50    pub fn from_raw(value: u32) -> Self {
51        Self(value)
52    }
53}
54
55impl Register for FactoryConf {
56    const ADDRESS: Address = Address::FactoryConf;
57}
58
59impl ReadableRegister for FactoryConf {}
60impl WritableRegister for FactoryConf {}
61
62impl From<u32> for FactoryConf {
63    fn from(value: u32) -> Self {
64        Self(value)
65    }
66}
67
68impl From<FactoryConf> for u32 {
69    fn from(reg: FactoryConf) -> u32 {
70        reg.0
71    }
72}