pub struct ReecaParams {Show 23 fields
pub trv: f64,
pub kqv: f64,
pub tp: f64,
pub kqp: f64,
pub kqi: f64,
pub vref0: f64,
pub dbd1: f64,
pub dbd2: f64,
pub vdip: f64,
pub vup: f64,
pub iqh1: f64,
pub iql1: f64,
pub qmax: f64,
pub qmin: f64,
pub tpfilt: f64,
pub tqfilt: f64,
pub rrpwr: f64,
pub rrpwr_dn: f64,
pub pqflag: i32,
pub imax: f64,
pub ipmax: f64,
pub vdl1: [(f64, f64); 4],
pub vdl2: [(f64, f64); 4],
}Expand description
REEC_A – IBR electrical controller (maps to exciter slot, Phase 8 simplified).
Simplified to voltage-following / constant power factor mode. Full REEC_A includes Kqv droop, deadband, FRT limits.
This is a standard planning-level model for IBR electrical controllers. For studies involving IBR fault ride-through, voltage regulation, or reactive power control, use the full REEC_A model with Kqv droop and deadband parameters. See the module-level documentation for the full model mapping.
Key params: Trv Kqv Tp Kqp Kqi Vref0 Dbd1 Dbd2 Vdip Vup Iqh1 Iql1 Qmax Qmin
Fields§
§trv: f64Voltage filter time constant (s).
kqv: f64Reactive power control voltage droop gain.
tp: f64Active current filter time constant (s).
kqp: f64Reactive power proportional gain.
kqi: f64Reactive power integral gain (1/s).
vref0: f64Initial voltage reference (pu).
dbd1: f64Voltage deadband lower limit (pu, negative).
dbd2: f64Voltage deadband upper limit (pu, positive).
vdip: f64Low voltage protection threshold (pu).
vup: f64High voltage protection threshold (pu).
iqh1: f64Maximum reactive current (pu).
iql1: f64Minimum reactive current (pu).
qmax: f64Maximum reactive power (pu).
qmin: f64Minimum reactive power (pu).
tpfilt: f64Active power measurement filter time constant (s).
tqfilt: f64Reactive power measurement filter time constant (s).
rrpwr: f64Active power ramp rate up limit (pu/s).
rrpwr_dn: f64Active power ramp rate down limit (pu/s, negative).
pqflag: i32Current priority flag: 0 = Q priority, 1 = P priority.
imax: f64Maximum total current magnitude (pu).
ipmax: f64Maximum active current (pu, used with PQFLAG=1).
vdl1: [(f64, f64); 4]VDL1 breakpoints: voltage-dependent reactive current limit (Vq, Iq) pairs. If all zeros or empty, flat iqh1/iql1 limits apply.
vdl2: [(f64, f64); 4]VDL2 breakpoints: voltage-dependent active current limit (Vp, Ip) pairs. If all zeros or empty, flat ipmax limit applies.
Trait Implementations§
Source§impl Clone for ReecaParams
impl Clone for ReecaParams
Source§fn clone(&self) -> ReecaParams
fn clone(&self) -> ReecaParams
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source. Read more