Enum FACTSModel 

pub enum FACTSModel {
    Csvgn1(Csvgn1Params),
    Cstcon(CstconParams),
    Tcsc(TcscParams),
    Cdc4t(Cdc4tParams),
    Vscdct(VscdctParams),
    Csvgn3(Csvgn3Params),
    Cdc7t(Cdc7tParams),
    Csvgn4(Csvgn4Params),
    Csvgn5(Csvgn5Params),
    Cdc6t(Cdc6tParams),
    Cstcnt(CstcntParams),
    Mmc1(Mmc1Params),
    Hvdcplu1(HvdcPlu1Params),
    Csvgn6(Csvgn6Params),
    Stcon1(Stcon1Params),
    Gcsc(GcscParams),
    Sssc(SsscParams),
    Upfc(UpfcParams),
    Cdc3t(Cdc3tParams),
    Svsmo1(Svsmo1Params),
    Svsmo2(Svsmo2Params),
    Svsmo3(Svsmo3Params),
}

Discriminated union of supported FACTS/HVDC dynamic models.

Variants

Csvgn1(Csvgn1Params)

CSVGN1 — Static VAr Compensator (most common SVC model).

Cstcon(CstconParams)

CSTCON — STATCOM (current-source reactive control).

Tcsc(TcscParams)

TCSC — Thyristor-Controlled Series Capacitor.

Cdc4t(Cdc4tParams)

CDC4T — Generic LCC HVDC Two-Terminal.

Vscdct(VscdctParams)

VSCDCT — Generic VSC HVDC Two-Terminal.

Csvgn3(Csvgn3Params)

CSVGN3 — SVC with slope/droop regulator (Phase 15, 3 states).

Cdc7t(Cdc7tParams)

CDC7T — LCC HVDC + runback + current order controllers (Phase 15, 6 states).

Csvgn4(Csvgn4Params)

CSVGN4 — SVC with 4 states (adds POD) (Phase 20).

Csvgn5(Csvgn5Params)

CSVGN5 — SVC with 4 states (voltage support mode) (Phase 20).

Cdc6t(Cdc6tParams)

CDC6T — LCC HVDC with enhanced controls (Phase 20).

Cstcnt(CstcntParams)

CSTCNT — STATCOM with N controls (4 states) (Phase 20).

Mmc1(Mmc1Params)

MMC1 — Modular Multilevel Converter (5 states) (Phase 20).

Hvdcplu1(HvdcPlu1Params)

HVDCPLU1 — Siemens HVDC Plus VSC (Phase 26, 6 states, reuses Vscdct layout).

Csvgn6(Csvgn6Params)

CSVGN6 — SVC Variant 6 with Auxiliary Inputs (Phase 26, 5 states).

Stcon1(Stcon1Params)

STCON1 — STATCOM with Inner Current Control (Phase 26, 4 states).

Gcsc(GcscParams)

GCSC — Gate-Controlled Series Compensator (Phase 26, 3 states).

Sssc(SsscParams)

SSSC — Static Synchronous Series Compensator (Phase 26, 4 states).

Upfc(UpfcParams)

UPFC — Unified Power Flow Controller (Phase 26, 6 states).

Cdc3t(Cdc3tParams)

CDC3T — Three-Terminal LCC HVDC (Phase 26, 8 states).

Svsmo1(Svsmo1Params)

SVSMO1 — WECC Generic SVC voltage regulator (1 state).

Svsmo2(Svsmo2Params)

SVSMO2 — WECC Generic STATCOM (1 state).

Svsmo3(Svsmo3Params)

SVSMO3 — WECC Advanced SVC (2 states: b_svc + vr).

Trait Implementations

impl Clone for FACTSModel

fn clone(&self) -> FACTSModel

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for FACTSModel

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<'de> Deserialize<'de> for FACTSModel

fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>

where __D: Deserializer<'de>,

Deserialize this value from the given Serde deserializer.

impl Serialize for FACTSModel

fn serialize<__S>(&self, __serializer: __S) -> Result<__S::Ok, __S::Error>

where __S: Serializer,

Serialize this value into the given Serde serializer.