pub struct SharedTimePointTile<T: Copy + 'static> { /* private fields */ }Implementations§
Sourcepub fn create(path: impl AsRef<Path>) -> Result<Self, TileError>
pub fn create(path: impl AsRef<Path>) -> Result<Self, TileError>
Obtain the tile at path, initializing an empty one if the path
does not yet exist and attaching to it if it does. Attaching
leaves occupied slots and their versions in place; a region
built for a different payload type is a LayoutMismatch.
reset reinitializes.
Sourcepub fn reset(path: impl AsRef<Path>) -> Result<Self, TileError>
pub fn reset(path: impl AsRef<Path>) -> Result<Self, TileError>
Truncate the tile at path and initialize an empty one,
discarding every slot a live peer holds. For a caller that knows
it owns the path.
pub fn open(path: impl AsRef<Path>) -> Result<Self, TileError>
pub fn header(&self) -> &TileHeader
Sourcepub fn insert(&self, version: u64, value: T) -> Result<usize, TileError>
pub fn insert(&self, version: u64, value: T) -> Result<usize, TileError>
Atomic insert via CAS on the occupied bitmap. Returns the
claimed lane index, or Err(Full).
pub fn remove(&self, lane: usize)
pub fn len(&self) -> usize
pub fn is_empty(&self) -> bool
pub fn is_full(&self) -> bool
Sourcepub fn visible_mask(&self, snapshot: u64) -> u16
pub fn visible_mask(&self, snapshot: u64) -> u16
SIMD scan: return a 16-bit lane mask of entries with version <= snapshot AND currently occupied. AVX2 uses the unsigned- compare-via-sign-XOR trick because cmpgt_epi64 is signed.
Sourcepub fn simd_visible_mask(versions: &[u64; 16], snapshot: u64) -> u16
pub fn simd_visible_mask(versions: &[u64; 16], snapshot: u64) -> u16
SIMD visibility scan dispatcher. Picks AVX-512F (one ZMM
per 8-lane half + mask-producing _mm512_cmple_epu64_mask)
when present, AVX2 (4 YMM compares with sign-bit XOR trick)
otherwise, scalar on non-x86 or feature-stripped builds.
Sourcepub unsafe fn simd_visible_mask_avx512(
versions: &[u64; 16],
snapshot: u64,
) -> u16
pub unsafe fn simd_visible_mask_avx512( versions: &[u64; 16], snapshot: u64, ) -> u16
AVX-512F path: TILE_CAP=16 covered by two 8-u64 chunks. Each
chunk uses one _mm512_loadu_si512 and one
_mm512_cmple_epu64_mask (returns __mmask8 directly - no
sign-bit XOR trick needed because the instruction is unsigned
natively). Two 8-bit masks pack into the 16-bit result via
low | (high << 8).
§Safety
Caller must ensure AVX-512F is available.
Sourcepub unsafe fn simd_visible_mask_avx2(versions: &[u64; 16], snapshot: u64) -> u16
pub unsafe fn simd_visible_mask_avx2(versions: &[u64; 16], snapshot: u64) -> u16
AVX2 path: 4 chunks of 4 u64. Signed cmpgt_epi64 plus
sign-bit XOR delivers the unsigned <= predicate; cmpeq
handles the equality boundary.
§Safety
Caller must ensure AVX2 is available.
Sourcepub fn simd_visible_mask_scalar(versions: &[u64; 16], snapshot: u64) -> u16
pub fn simd_visible_mask_scalar(versions: &[u64; 16], snapshot: u64) -> u16
Scalar reference: always available, used as the fallback for non-x86 builds and as the ground-truth oracle in tests.
Sourcepub fn visible_count(&self, snapshot: u64) -> u32
pub fn visible_count(&self, snapshot: u64) -> u32
Count visible at snapshot.
pub fn flush(&self) -> Result<(), TileError>
Sourcepub fn flush_async(&self) -> Result<(), TileError>
pub fn flush_async(&self) -> Result<(), TileError>
Non-blocking flush: schedules a writeback via the OS. Note: Windows is only partially async (sync to page cache, not to disk).