Enum Interrupt 

#[repr(u16)]
pub enum Interrupt {
    WWDG = 0,
    PVD_PVM_3 = 1,
    TAMP_RTCSTAMP_LSECSS_RTCSSRU = 2,
    RTC_WKUP = 3,
    FLASH = 4,
    RCC = 5,
    EXTI0 = 6,
    EXTI1 = 7,
    EXTI2 = 8,
    EXTI3 = 9,
    EXTI4 = 10,
    DMA1_CH1 = 11,
    DMA1_CH2 = 12,
    DMA1_CH3 = 13,
    DMA1_CH4 = 14,
    DMA1_CH5 = 15,
    DMA1_CH6 = 16,
    DMA1_CH7 = 17,
    ADC = 18,
    DAC = 19,
    PWR_C2H_C2SEV = 20,
    COMP = 21,
    EXTI9_5 = 22,
    TIM1_BRK = 23,
    TIM1_UP = 24,
    TIM1_TRG_COM = 25,
    TIM1_CC = 26,
    TIM2 = 27,
    TIM16 = 28,
    TIM17 = 29,
    I2C1_EV = 30,
    I2C1_ER = 31,
    I2C2_EV = 32,
    I2C2_ER = 33,
    SPI1 = 34,
    SPI2S2 = 35,
    USART1 = 36,
    USART2 = 37,
    LPUART1 = 38,
    LPTIM1 = 39,
    LPTIM2 = 40,
    EXTI15_10 = 41,
    RTC_ALARM = 42,
    LPTIM3 = 43,
    SUBGHZSPI = 44,
    IPCC_C1_RX_IT = 45,
    IPCC_C1_TX_IT = 46,
    HSEM = 47,
    I2C3_EV = 48,
    I2C3_ER = 49,
    RADIO_IRQ_BUSY = 50,
    AES = 51,
    TRUE_RNG = 52,
    PKA = 53,
    DMA2_CH1 = 54,
    DMA2_CH2 = 55,
    DMA2_CH3 = 56,
    DMA2_CH4 = 57,
    DMA2_CH5 = 58,
    DMA2_CH6 = 59,
    DMA2_CH7 = 60,
    DMAMUX1_OVR = 61,
}

Enumeration of all the interrupts.

Variants

WWDG = 0

0 - Window watchdog early wakeup interrupt

PVD_PVM_3 = 1

1 - PVD through EXTI[16], PVM[3] through EXTI[34]

TAMP_RTCSTAMP_LSECSS_RTCSSRU = 2

2 - Tamper, TimeStamp, LSECSS,RTC_SSRU interrupt

RTC_WKUP = 3

3 - RTC wakeup interrupt

FLASH = 4

4 - Flash memory global interrupt and Flash memory ECC single error interrupt

RCC = 5

5 - RCC global interrupt

EXTI0 = 6

6 - EXTI line 0 interrupt through EXTI

EXTI1 = 7

7 - EXTI line 1 interrupt through EXTI

EXTI2 = 8

8 - EXTI line 2 interrupt through EXTI

EXTI3 = 9

9 - EXTI line 3 interrupt through EXTI

EXTI4 = 10

10 - EXTI line 4 interrupt through EXTI

DMA1_CH1 = 11

11 - DMA1 channel 1 non-secure interrupt

DMA1_CH2 = 12

12 - DMA1 channel 2 non-secure interrupt

DMA1_CH3 = 13

13 - DMA1 channel 3 non-secure interrupt

DMA1_CH4 = 14

14 - DMA1 channel 4 non-secure interrupt

DMA1_CH5 = 15

15 - DMA1 channel 5 non-secure interrupt

DMA1_CH6 = 16

16 - DMA1 channel 6 non-secure interrupt

DMA1_CH7 = 17

17 - DMA1 channel 7 non-secure interrupt

ADC = 18

18 - ADC global interrupt

DAC = 19

19 - DAC global interrupt

PWR_C2H_C2SEV = 20

20 - PWR CPU2 HOLD wakeup interrupt ,CPU2 SEV through EXTI

COMP = 21

21 - COMP2 and COMP1 interrupt through EXTI[22:21]

EXTI9_5 = 22

22 - EXTI line 9_5 interrupt through EXTI

TIM1_BRK = 23

23 - Timer 1 break interrupt

TIM1_UP = 24

24 - Timer 1 Update

TIM1_TRG_COM = 25

25 - Timer 1 trigger and communication

TIM1_CC = 26

26 - Timer 1 capture compare interrupt

TIM2 = 27

27 - Timer 2 global interrupt

TIM16 = 28

28 - Timer 16 global interrupt

TIM17 = 29

29 - Timer 17 global interrupt

I2C1_EV = 30

30 - I2C1 event interrupt

I2C1_ER = 31

31 - I2C1 event interrupt

I2C2_EV = 32

32 - I2C2 event interrupt

I2C2_ER = 33

33 - I2C2 error interrupt

SPI1 = 34

34 - SPI 1 global interrupt

SPI2S2 = 35

35 - SPI2S2 global interrupt

USART1 = 36

36 - USART1 global interrupt

USART2 = 37

37 - USART2 global interrupt

LPUART1 = 38

38 - LPUART1 global interrupt

LPTIM1 = 39

39 - LPtimer 1 global interrupt

LPTIM2 = 40

40 - LPtimer 2 global interrupt

EXTI15_10 = 41

41 - EXTI line 15_10] interrupt through EXTI

RTC_ALARM = 42

42 - RTC alarms A and B interrupt

LPTIM3 = 43

43 - LPtimer 3 global interrupt

SUBGHZSPI = 44

44 - Sub-GHz radio SPI global interrupt

IPCC_C1_RX_IT = 45

45 - IPCC CPU1 RX occupied interrupt

IPCC_C1_TX_IT = 46

46 - IPCC CPU1 TX free interrupt

HSEM = 47

47 - Semaphore interrupt 0 to CPU1

I2C3_EV = 48

48 - I2C3 event interrupt

I2C3_ER = 49

49 - I2C3 error interrupt

RADIO_IRQ_BUSY = 50

50 - Radio IRQs, RFBUSY interrupt through EXTI

AES = 51

51 - AES global interrupt

TRUE_RNG = 52

52 - True random number generator interrupt

PKA = 53

53 - Private key accelerator interrupt

DMA2_CH1 = 54

54 - DMA2 channel 1 non-secure interrupt

DMA2_CH2 = 55

55 - DMA2 channel 2 non-secure interrupt

DMA2_CH3 = 56

56 - DMA2 channel 3 non-secure interrupt

DMA2_CH4 = 57

57 - DMA2 channel 4 non-secure interrupt

DMA2_CH5 = 58

58 - DMA2 channel 5 non-secure interrupt

DMA2_CH6 = 59

59 - DMA2 channel 6 non-secure interrupt

DMA2_CH7 = 60

60 - DMA2 channel 7 non-secure interrupt

DMAMUX1_OVR = 61

61 - DMAMUX1 overrun interrupt

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt