Type Definition stm32wb_stm32hal::stm32wb55::rcc::c2ahb2smenr::R[][src]

pub type R = R<u32, C2AHB2SMENR>;
Expand description

Reader of register C2AHB2SMENR

Implementations

Bit 16 - CPU2 AES1 accelerator clocks enable during Sleep and Stop modes

Bit 13 - CPU2 ADC clocks enable during Sleep and Stop modes

Bit 7 - CPU2 IO port H clocks enable during Sleep and Stop modes

Bit 4 - CPU2 IO port E clocks enable during Sleep and Stop modes

Bit 3 - CPU2 IO port D clocks enable during Sleep and Stop modes

Bit 2 - CPU2 IO port C clocks enable during Sleep and Stop modes

Bit 1 - CPU2 IO port B clocks enable during Sleep and Stop modes

Bit 0 - CPU2 IO port A clocks enable during Sleep and Stop modes