Type Definition stm32wb_stm32hal::stm32wb55::syscfg::c2imr2::R

type R = R<u32, C2IMR2>;

Reader of register C2IMR2

Implementations

impl R

pub fn dma1_ch1_im(&self) -> DMA1_CH1_IM_R

Bit 0 - Peripheral DMA1 CH1 interrupt mask to CPU2

pub fn dma1_ch2_im(&self) -> DMA1_CH2_IM_R

Bit 1 - Peripheral DMA1 CH2 interrupt mask to CPU2

pub fn dma1_ch3_im(&self) -> DMA1_CH3_IM_R

Bit 2 - Peripheral DMA1 CH3 interrupt mask to CPU2

pub fn dma1_ch4_im(&self) -> DMA1_CH4_IM_R

Bit 3 - Peripheral DMA1 CH4 interrupt mask to CPU2

pub fn dma1_ch5_im(&self) -> DMA1_CH5_IM_R

Bit 4 - Peripheral DMA1 CH5 interrupt mask to CPU2

pub fn dma1_ch6_im(&self) -> DMA1_CH6_IM_R

Bit 5 - Peripheral DMA1 CH6 interrupt mask to CPU2

pub fn dma1_ch7_im(&self) -> DMA1_CH7_IM_R

Bit 6 - Peripheral DMA1 CH7 interrupt mask to CPU2

pub fn dma2_ch1_im(&self) -> DMA2_CH1_IM_R

Bit 8 - Peripheral DMA2 CH1 interrupt mask to CPU1

pub fn dma2_ch2_im(&self) -> DMA2_CH2_IM_R

Bit 9 - Peripheral DMA2 CH2 interrupt mask to CPU1

pub fn dma2_ch3_im(&self) -> DMA2_CH3_IM_R

Bit 10 - Peripheral DMA2 CH3 interrupt mask to CPU1

pub fn dma2_ch4_im(&self) -> DMA2_CH4_IM_R

Bit 11 - Peripheral DMA2 CH4 interrupt mask to CPU1

pub fn dma2_ch5_im(&self) -> DMA2_CH5_IM_R

Bit 12 - Peripheral DMA2 CH5 interrupt mask to CPU1

pub fn dma2_ch6_im(&self) -> DMA2_CH6_IM_R

Bit 13 - Peripheral DMA2 CH6 interrupt mask to CPU1

pub fn dma2_ch7_im(&self) -> DMA2_CH7_IM_R

Bit 14 - Peripheral DMA2 CH7 interrupt mask to CPU1

pub fn dmam_ux1_im(&self) -> DMAM_UX1_IM_R

Bit 15 - Peripheral DMAM UX1 interrupt mask to CPU1

pub fn pvm1im(&self) -> PVM1IM_R

Bit 16 - Peripheral PVM1IM interrupt mask to CPU1

pub fn pvm3im(&self) -> PVM3IM_R

Bit 18 - Peripheral PVM3IM interrupt mask to CPU1

pub fn pvdim(&self) -> PVDIM_R

Bit 20 - Peripheral PVDIM interrupt mask to CPU1

pub fn tscim(&self) -> TSCIM_R

Bit 21 - Peripheral TSCIM interrupt mask to CPU1

pub fn lcdim(&self) -> LCDIM_R

Bit 22 - Peripheral LCDIM interrupt mask to CPU1