Type Definition stm32wb_stm32hal::stm32wb55::rcc::ahb1smenr::R [−][src]
type R = R<u32, AHB1SMENR>;
Expand description
Reader of register AHB1SMENR
Implementations
Bit 16 - CPU1 Touch Sensing Controller clocks enable during Sleep and Stop modes
Bit 9 - CPU1 SRAM1 interface clocks enable during Sleep and Stop modes
Bit 2 - CPU1 DMAMUX clocks enable during Sleep and Stop modes
Bit 1 - CPU1 DMA2 clocks enable during Sleep and Stop modes
Bit 0 - CPU1 DMA1 clocks enable during Sleep and Stop modes