#[repr(C)]pub struct RegisterBlock {Show 37 fields
pub ep0r: EP0R,
pub ep1r: EP1R,
pub ep2r: EP2R,
pub ep3r: EP3R,
pub ep4r: EP4R,
pub ep5r: EP5R,
pub ep6r: EP6R,
pub ep7r: EP7R,
pub cntr: CNTR,
pub istr: ISTR,
pub fnr: FNR,
pub daddr: DADDR,
pub btable: BTABLE,
pub count0_tx: COUNT0_TX,
pub count0_rx: COUNT0_RX,
pub bcdr: BCDR,
pub count1_tx: COUNT1_TX,
pub addr1_rx: ADDR1_RX,
pub count1_rx: COUNT1_RX,
pub count2_tx: COUNT2_TX,
pub addr2_rx: ADDR2_RX,
pub count2_rx: COUNT2_RX,
pub count3_tx: COUNT3_TX,
pub addr3_rx: ADDR3_RX,
pub count3_rx: COUNT3_RX,
pub count4_tx: COUNT4_TX,
pub addr4_rx: ADDR4_RX,
pub count4_rx: COUNT4_RX,
pub count5_tx: COUNT5_TX,
pub addr5_rx: ADDR5_RX,
pub count5_rx: COUNT5_RX,
pub count6_tx: COUNT6_TX,
pub addr6_rx: ADDR6_RX,
pub count6_rx: COUNT6_RX,
pub count7_tx: COUNT7_TX,
pub addr7_rx: ADDR7_RX,
pub count7_rx: COUNT7_RX,
/* private fields */
}Expand description
Register block
Fields§
§ep0r: EP0R0x00 - endpoint 0 register
ep1r: EP1R0x04 - endpoint 1 register
ep2r: EP2R0x08 - endpoint 2 register
ep3r: EP3R0x0c - endpoint 3 register
ep4r: EP4R0x10 - endpoint 4 register
ep5r: EP5R0x14 - endpoint 5 register
ep6r: EP6R0x18 - endpoint 6 register
ep7r: EP7R0x1c - endpoint 7 register
cntr: CNTR0x40 - control register
istr: ISTR0x44 - interrupt status register
fnr: FNR0x48 - frame number register
daddr: DADDR0x4c - device address
btable: BTABLE0x50 - Buffer table address
count0_tx: COUNT0_TX0x52 - Transmission byte count 0
count0_rx: COUNT0_RX0x56 - Reception byte count 0
bcdr: BCDR0x58 - Battery charging detector(
count1_tx: COUNT1_TX0x5a - Transmission byte count 0
addr1_rx: ADDR1_RX0x5c - Reception buffer address 0
count1_rx: COUNT1_RX0x5e - Reception byte count 0
count2_tx: COUNT2_TX0x62 - Transmission byte count 0
addr2_rx: ADDR2_RX0x64 - Reception buffer address 0
count2_rx: COUNT2_RX0x66 - Reception byte count 0
count3_tx: COUNT3_TX0x6a - Transmission byte count 0
addr3_rx: ADDR3_RX0x6c - Reception buffer address 0
count3_rx: COUNT3_RX0x6e - Reception byte count 0
count4_tx: COUNT4_TX0x72 - Transmission byte count 0
addr4_rx: ADDR4_RX0x74 - Reception buffer address 0
count4_rx: COUNT4_RX0x76 - Reception byte count 0
count5_tx: COUNT5_TX0x7a - Transmission byte count 0
addr5_rx: ADDR5_RX0x7c - Reception buffer address 0
count5_rx: COUNT5_RX0x7e - Reception byte count 0
count6_tx: COUNT6_TX0x82 - Transmission byte count 0
addr6_rx: ADDR6_RX0x84 - Reception buffer address 0
count6_rx: COUNT6_RX0x86 - Reception byte count 0
count7_tx: COUNT7_TX0x8a - Transmission byte count 0
addr7_rx: ADDR7_RX0x8c - Reception buffer address 0
count7_rx: COUNT7_RX0x8e - Reception byte count 0
Implementations§
Source§impl RegisterBlock
impl RegisterBlock
Sourcepub fn lpmcsr_mut(&self) -> &mut LPMCSR
pub fn lpmcsr_mut(&self) -> &mut LPMCSR
0x54 - control and status register
Sourcepub fn addr0_rx_mut(&self) -> &mut ADDR0_RX
pub fn addr0_rx_mut(&self) -> &mut ADDR0_RX
0x54 - Reception buffer address 0