#[repr(C)]pub struct RegisterBlock {Show 19 fields
pub acr: ACR,
pub keyr: KEYR,
pub optkeyr: OPTKEYR,
pub sr: SR,
pub cr: CR,
pub eccr: ECCR,
pub optr: OPTR,
pub pcrop1asr: PCROP1ASR,
pub pcrop1aer: PCROP1AER,
pub wrp1ar: WRP1AR,
pub wrp1br: WRP1BR,
pub pcrop1bsr: PCROP1BSR,
pub pcrop1ber: PCROP1BER,
pub ipccbr: IPCCBR,
pub c2acr: C2ACR,
pub c2sr: C2SR,
pub c2cr: C2CR,
pub sfr: SFR,
pub srrvr: SRRVR,
/* private fields */
}Expand description
Register block
Fields§
§acr: ACR0x00 - Access control register
keyr: KEYR0x08 - Flash key register
optkeyr: OPTKEYR0x0c - Option byte key register
sr: SR0x10 - Status register
cr: CR0x14 - Flash control register
eccr: ECCR0x18 - Flash ECC register
optr: OPTR0x20 - Flash option register
pcrop1asr: PCROP1ASR0x24 - Flash Bank 1 PCROP Start address zone A register
pcrop1aer: PCROP1AER0x28 - Flash Bank 1 PCROP End address zone A register
wrp1ar: WRP1AR0x2c - Flash Bank 1 WRP area A address register
wrp1br: WRP1BR0x30 - Flash Bank 1 WRP area B address register
pcrop1bsr: PCROP1BSR0x34 - Flash Bank 1 PCROP Start address area B register
pcrop1ber: PCROP1BER0x38 - Flash Bank 1 PCROP End address area B register
ipccbr: IPCCBR0x3c - IPCC mailbox data buffer address register
c2acr: C2ACR0x5c - CPU2 cortex M0 access control register
c2sr: C2SR0x60 - CPU2 cortex M0 status register
c2cr: C2CR0x64 - CPU2 cortex M0 control register
sfr: SFR0x80 - Secure flash start address register
srrvr: SRRVR0x84 - Secure SRAM2 start address and cortex M0 reset vector register