#[repr(C)]pub struct RegisterBlock {Show 26 fields
pub rtsr1: RTSR1,
pub ftsr1: FTSR1,
pub swier1: SWIER1,
pub pr1: PR1,
pub rtsr2: RTSR2,
pub ftsr2: FTSR2,
pub swier2: SWIER2,
pub pr2: PR2,
pub c1imr1: C1IMR1,
pub c1emr1: C1EMR1,
pub c1imr2: C1IMR2,
pub c1emr2: C1EMR2,
pub c2imr1: C2IMR1,
pub c2emr1: C2EMR1,
pub c2imr2: C2IMR2,
pub c2emr2: C2EMR2,
pub hwcfgr7: HWCFGR7,
pub hwcfgr6: HWCFGR6,
pub hwcfgr5: HWCFGR5,
pub hwcfgr4: HWCFGR4,
pub hwcfgr3: HWCFGR3,
pub hwcfgr2: HWCFGR2,
pub hwcfgr1: HWCFGR1,
pub verr: VERR,
pub ipidr: IPIDR,
pub sidr: SIDR,
/* private fields */
}Expand description
Register block
Fields§
§rtsr1: RTSR10x00 - rising trigger selection register
ftsr1: FTSR10x04 - falling trigger selection register
swier1: SWIER10x08 - software interrupt event register
pr1: PR10x0c - EXTI pending register
rtsr2: RTSR20x20 - rising trigger selection register
ftsr2: FTSR20x24 - falling trigger selection register
swier2: SWIER20x28 - software interrupt event register
pr2: PR20x2c - pending register
c1imr1: C1IMR10x80 - CPUm wakeup with interrupt mask register
c1emr1: C1EMR10x84 - CPUm wakeup with event mask register
c1imr2: C1IMR20x90 - CPUm wakeup with interrupt mask register
c1emr2: C1EMR20x94 - CPUm wakeup with event mask register
c2imr1: C2IMR10xc0 - CPUm wakeup with interrupt mask register
c2emr1: C2EMR10xc4 - CPUm wakeup with event mask register
c2imr2: C2IMR20xd0 - CPUm wakeup with interrupt mask register
c2emr2: C2EMR20xd4 - CPUm wakeup with event mask register
hwcfgr7: HWCFGR70x3d8 - EXTI Hardware configuration registers
hwcfgr6: HWCFGR60x3dc - Hardware configuration registers
hwcfgr5: HWCFGR50x3e0 - Hardware configuration registers
hwcfgr4: HWCFGR40x3e4 - Hardware configuration registers
hwcfgr3: HWCFGR30x3e8 - Hardware configuration registers
hwcfgr2: HWCFGR20x3ec - Hardware configuration registers
hwcfgr1: HWCFGR10x3f0 - Hardware configuration register 1
verr: VERR0x3f4 - EXTI IP Version register
ipidr: IPIDR0x3f8 - Identification register
sidr: SIDR0x3fc - Size ID register