#[repr(u16)]pub enum Interrupt {
Show 99 variants
WWDG = 0,
PVD_PVM = 1,
RTC = 2,
RTC_S = 3,
TAMP = 4,
TAMP_S = 5,
FLASH = 6,
FLASH_S = 7,
RCC = 9,
RCC_S = 10,
EXTI0 = 11,
EXTI1 = 12,
EXTI2 = 13,
EXTI3 = 14,
EXTI4 = 15,
EXTI5 = 16,
EXTI6 = 17,
EXTI7 = 18,
EXTI8 = 19,
EXTI9 = 20,
EXTI10 = 21,
EXTI11 = 22,
EXTI12 = 23,
EXTI13 = 24,
EXTI14 = 25,
EXTI15 = 26,
DMAMUX1_OVR = 27,
DMAMUX1_OVR_S = 28,
DMA1_CH1 = 29,
DMA1_CH2 = 30,
DMA1_CH3 = 31,
DMA1_CH4 = 32,
DMA1_CH5 = 33,
DMA1_CH6 = 34,
DMA1_CH7 = 35,
DMA1_Channel8 = 36,
ADC1_2 = 37,
FDCAN1_IT0 = 39,
FDCAN1_IT1 = 40,
TIM1_BRK = 41,
TIM1_UP = 42,
TIM1_TRG_COM = 43,
TIM1_CC = 44,
TIM2 = 45,
TIM3 = 46,
TIM4 = 47,
TIM5 = 48,
TIM6 = 49,
TIM7 = 50,
TIM8_BRK = 51,
TIM8_UP = 52,
TIM8_TRG_COM = 53,
TIM8_CC = 54,
I2C1_EV = 55,
I2C1_ER = 56,
I2C2_EV = 57,
I2C2_ER = 58,
SPI1 = 59,
SPI2 = 60,
USART1 = 61,
USART2 = 62,
USART3 = 63,
UART4 = 64,
UART5 = 65,
LPUART1 = 66,
LPTIM1 = 67,
LPTIM2 = 68,
TIM15 = 69,
TIM16 = 70,
TIM17 = 71,
COMP = 72,
USB_FS = 73,
FMC = 75,
OCTOSPI1 = 76,
SDMMC1 = 78,
DMA2_CH1 = 80,
DMA2_CH2 = 81,
DMA2_CH3 = 82,
DMA2_CH4 = 83,
DMA2_CH5 = 84,
DMA2_CH6 = 85,
DMA2_CH7 = 86,
DMA2_CH8 = 87,
I2C3_EV = 88,
I2C3_ER = 89,
SAI1 = 90,
SAI2 = 91,
TSC = 92,
RNG = 94,
LPTIM3 = 98,
SPI3 = 99,
I2C4_ER = 100,
I2C4_EV = 101,
DFSDM1_FLT0 = 102,
DFSDM1_FLT1 = 103,
DFSDM1_FLT2 = 104,
DFSDM1_FLT3 = 105,
UCPD1 = 106,
ICACHE = 107,
}
Expand description
Available interrupts for this device
Variants§
WWDG = 0
0: Window Watchdog interrupt
PVD_PVM = 1
1: PVD/PVM1/PVM2/PVM3/PVM4 through EXTI
RTC = 2
2: RTC global interrupts (EXTI line 17)
RTC_S = 3
3: RTC secure global interrupts (EXTI line 18)
TAMP = 4
4: TAMPTamper global interrupt (EXTI line 19)
TAMP_S = 5
5: Tamper secure global interrupt (EXTI line 20)
FLASH = 6
6: Flash global interrupt
FLASH_S = 7
7: Flash memory secure global interrupt
RCC = 9
9: RCC global interrupt
RCC_S = 10
10: RCC SECURE GLOBAL INTERRUPT
EXTI0 = 11
11: EXTI line0 interrupt
EXTI1 = 12
12: EXTI line1 interrupt
EXTI2 = 13
13: EXTI line2 interrupt
EXTI3 = 14
14: EXTI line3 interrupt
EXTI4 = 15
15: EXTI line4 interrupt
EXTI5 = 16
16: EXTI line5 interrupt
EXTI6 = 17
17: EXTI line6 interrupt
EXTI7 = 18
18: EXTI line7 interrupt
EXTI8 = 19
19: EXTI line8 interrupt
EXTI9 = 20
20: EXTI line9 interrupt
EXTI10 = 21
21: EXTI line10 interrupt
EXTI11 = 22
22: EXTI line11 interrupt
EXTI12 = 23
23: EXTI line12 interrupt
EXTI13 = 24
24: EXTI line13 interrupt
EXTI14 = 25
25: EXTI line14 interrupt
EXTI15 = 26
26: EXTI line15 interrupt
DMAMUX1_OVR = 27
27: DMAMUX overrun interrupt
DMAMUX1_OVR_S = 28
28: DMAMUX1 secure overRun interrupt
DMA1_CH1 = 29
29: DMA1 Channel1 global interrupt
DMA1_CH2 = 30
30: DMA1 Channel2 global interrupt
DMA1_CH3 = 31
31: DMA1 Channel3 interrupt
DMA1_CH4 = 32
32: DMA1 Channel4 interrupt
DMA1_CH5 = 33
33: DMA1 Channel5 interrupt
DMA1_CH6 = 34
34: DMA1 Channel6 interrupt
DMA1_CH7 = 35
35: DMA1 Channel 7 interrupt
DMA1_Channel8 = 36
36: DMA1_Channel8
ADC1_2 = 37
37: ADC1_2 global interrupt
FDCAN1_IT0 = 39
39: FDCAN1 Interrupt 0
FDCAN1_IT1 = 40
40: FDCAN1 Interrupt 1
TIM1_BRK = 41
41: TIM1 Break
TIM1_UP = 42
42: TIM1 Update
TIM1_TRG_COM = 43
43: TIM1 Trigger and Commutation
TIM1_CC = 44
44: TIM1 Capture Compare interrupt
TIM2 = 45
45: TIM2 global interrupt
TIM3 = 46
46: TIM3 global interrupt
TIM4 = 47
47: TIM4 global interrupt
TIM5 = 48
48: TIM5 global interrupt
TIM6 = 49
49: TIM6 global interrupt
TIM7 = 50
50: TIM7 global interrupt
TIM8_BRK = 51
51: TIM8 Break Interrupt
TIM8_UP = 52
52: TIM8 Update Interrupt
TIM8_TRG_COM = 53
53: TIM8 Trigger and Commutation Interrupt
TIM8_CC = 54
54: TIM8 Capture Compare Interrupt
I2C1_EV = 55
55: I2C1 event interrupt
I2C1_ER = 56
56: I2C1 error interrupt
I2C2_EV = 57
57: I2C2 event interrupt
I2C2_ER = 58
58: I2C2 error interrupt
SPI1 = 59
59: SPI1 global interrupt
SPI2 = 60
60: SPI2 global interrupt
USART1 = 61
61: USART1 global interrupt
USART2 = 62
62: USART2 global interrupt
USART3 = 63
63: USART3 global interrupt
UART4 = 64
64: UART4 global interrupt
UART5 = 65
65: UART5 global interrupt
LPUART1 = 66
66: LPUART1 global interrupt
LPTIM1 = 67
67: LP TIM1 interrupt
LPTIM2 = 68
68: LP TIM2 interrupt
TIM15 = 69
69: TIM15 global interrupt
TIM16 = 70
70: TIM16 global interrupt
TIM17 = 71
71: TIM17 global interrupt
COMP = 72
72: COMP1 and COMP2 interrupts
USB_FS = 73
73: USB FS global interrupt
FMC = 75
75: FMC global interrupt
OCTOSPI1 = 76
76: OCTOSPI1 global interrupt
SDMMC1 = 78
78: SDMMC1 global interrupt
DMA2_CH1 = 80
80: DMA2_CH1
DMA2_CH2 = 81
81: DMA2_CH2
DMA2_CH3 = 82
82: DMA2_CH3
DMA2_CH4 = 83
83: DMA2_CH4
DMA2_CH5 = 84
84: DMA2_CH5
DMA2_CH6 = 85
85: DMA2_CH6
DMA2_CH7 = 86
86: DMA2_CH7
DMA2_CH8 = 87
87: DMA2_CH8
I2C3_EV = 88
88: I2C3 event interrupt
I2C3_ER = 89
89: I2C3 error interrupt
SAI1 = 90
90: SAI1 global interrupt
SAI2 = 91
91: SAI2 global interrupt
TSC = 92
92: TSC global interrupt
RNG = 94
94: RNG global interrupt
LPTIM3 = 98
98: LPTIM3
SPI3 = 99
99: SPI3
I2C4_ER = 100
100: I2C4 error interrupt
I2C4_EV = 101
101: I2C4 event interrupt
DFSDM1_FLT0 = 102
102: DFSDM1_FLT0 global interrupt
DFSDM1_FLT1 = 103
103: DFSDM1_FLT1 global interrupt
DFSDM1_FLT2 = 104
104: DFSDM1_FLT2 global interrupt
DFSDM1_FLT3 = 105
105: DFSDM1_FLT3 global interrupt
UCPD1 = 106
106: UCPD global interrupt
ICACHE = 107
107: ICACHE