Expand description
Advanced timer
Used by: stm32f103, stm32f107
Modules§
- ARR
- auto-reload register
- BDTR
- break and dead-time register
- CCER
- capture/compare enable register
- CCMR1
- CCMR1_Output and CCMR1_Input CCMR1_Output: capture/compare mode register (output mode) CCMR1_Input: capture/compare mode register 1 (input mode)
- CCMR2
- CCMR2_Output and CCMR2_Input CCMR2_Output: capture/compare mode register (output mode) CCMR2_Input: capture/compare mode register 2 (input mode)
- CCR1
- capture/compare register
- CCR2
- capture/compare register
- CCR3
- capture/compare register
- CCR4
- capture/compare register
- CNT
- counter
- CR1
- control register 1
- CR2
- control register 2
- DCR
- DMA control register
- DIER
- DMA/Interrupt enable register
- DMAR
- DMA address for full transfer
- EGR
- event generation register
- PSC
- prescaler
- RCR
- repetition counter register
- SMCR
- slave mode control register
- SR
- status register