Struct stm32ral::stm32wb::stm32wb55::syscfg::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 16 fields
pub MEMRMP: RWRegister<u32>,
pub CFGR1: RWRegister<u32>,
pub EXTICR1: RWRegister<u32>,
pub EXTICR2: RWRegister<u32>,
pub EXTICR3: RWRegister<u32>,
pub EXTICR4: RWRegister<u32>,
pub SCSR: RWRegister<u32>,
pub CFGR2: RWRegister<u32>,
pub SWPR: WORegister<u32>,
pub SKR: WORegister<u32>,
pub SWPR2: WORegister<u32>,
pub IMR1: RWRegister<u32>,
pub IMR2: RWRegister<u32>,
pub C2IMR1: RWRegister<u32>,
pub C2IMR2: RWRegister<u32>,
pub SIPCR: RWRegister<u32>,
// some fields omitted
}
Fields
MEMRMP: RWRegister<u32>
memory remap register
CFGR1: RWRegister<u32>
configuration register 1
EXTICR1: RWRegister<u32>
external interrupt configuration register 1
EXTICR2: RWRegister<u32>
external interrupt configuration register 2
EXTICR3: RWRegister<u32>
external interrupt configuration register 3
EXTICR4: RWRegister<u32>
external interrupt configuration register 4
SCSR: RWRegister<u32>
SCSR
CFGR2: RWRegister<u32>
CFGR2
SWPR: WORegister<u32>
SRAM2 write protection register
SKR: WORegister<u32>
SKR
SWPR2: WORegister<u32>
SRAM2 write protection register 2
IMR1: RWRegister<u32>
CPU1 interrupt mask register 1
IMR2: RWRegister<u32>
CPU1 interrupt mask register 2
C2IMR1: RWRegister<u32>
CPU2 interrupt mask register 1
C2IMR2: RWRegister<u32>
CPU2 interrupt mask register 1
SIPCR: RWRegister<u32>
secure IP control register