Struct stm32ral::stm32wb::stm32wb55::flash::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 19 fields
pub ACR: RWRegister<u32>,
pub KEYR: WORegister<u32>,
pub OPTKEYR: WORegister<u32>,
pub SR: RWRegister<u32>,
pub CR: RWRegister<u32>,
pub ECCR: RWRegister<u32>,
pub OPTR: RWRegister<u32>,
pub PCROP1ASR: RWRegister<u32>,
pub PCROP1AER: RWRegister<u32>,
pub WRP1AR: RWRegister<u32>,
pub WRP1BR: RWRegister<u32>,
pub PCROP1BSR: RWRegister<u32>,
pub PCROP1BER: RWRegister<u32>,
pub IPCCBR: RWRegister<u32>,
pub C2ACR: RWRegister<u32>,
pub C2SR: RWRegister<u32>,
pub C2CR: RWRegister<u32>,
pub SFR: RWRegister<u32>,
pub SRRVR: RWRegister<u32>,
// some fields omitted
}
Fields
ACR: RWRegister<u32>
Access control register
KEYR: WORegister<u32>
Flash key register
OPTKEYR: WORegister<u32>
Option byte key register
SR: RWRegister<u32>
Status register
CR: RWRegister<u32>
Flash control register
ECCR: RWRegister<u32>
Flash ECC register
OPTR: RWRegister<u32>
Flash option register
PCROP1ASR: RWRegister<u32>
Flash Bank 1 PCROP Start address zone A register
PCROP1AER: RWRegister<u32>
Flash Bank 1 PCROP End address zone A register
WRP1AR: RWRegister<u32>
Flash Bank 1 WRP area A address register
WRP1BR: RWRegister<u32>
Flash Bank 1 WRP area B address register
PCROP1BSR: RWRegister<u32>
Flash Bank 1 PCROP Start address area B register
PCROP1BER: RWRegister<u32>
Flash Bank 1 PCROP End address area B register
IPCCBR: RWRegister<u32>
IPCC mailbox data buffer address register
C2ACR: RWRegister<u32>
CPU2 cortex M0 access control register
C2SR: RWRegister<u32>
CPU2 cortex M0 status register
C2CR: RWRegister<u32>
CPU2 cortex M0 control register
SFR: RWRegister<u32>
Secure flash start address register
SRRVR: RWRegister<u32>
Secure SRAM2 start address and cortex M0 reset vector register