Struct stm32ral::stm32l5::peripherals::flash::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 33 fields
pub ACR: RWRegister<u32>,
pub PDKEYR: WORegister<u32>,
pub NSKEYR: WORegister<u32>,
pub SECKEYR: WORegister<u32>,
pub OPTKEYR: WORegister<u32>,
pub LVEKEYR: WORegister<u32>,
pub NSSR: RWRegister<u32>,
pub SECSR: RWRegister<u32>,
pub NSCR: RWRegister<u32>,
pub SECCR: RWRegister<u32>,
pub ECCR: RWRegister<u32>,
pub OPTR: RWRegister<u32>,
pub NSBOOTADD0R: WORegister<u32>,
pub NSBOOTADD1R: WORegister<u32>,
pub SECBOOTADD0R: RWRegister<u32>,
pub SECWM1R1: RWRegister<u32>,
pub SECWM1R2: RWRegister<u32>,
pub WRP1AR: RWRegister<u32>,
pub WRP1BR: RWRegister<u32>,
pub SECWM2R1: RWRegister<u32>,
pub SECWM2R2: RWRegister<u32>,
pub WRP2AR: RWRegister<u32>,
pub WRP2BR: RWRegister<u32>,
pub SECBB1R1: RWRegister<u32>,
pub SECBB1R2: RWRegister<u32>,
pub SECBB1R3: RWRegister<u32>,
pub SECBB1R4: RWRegister<u32>,
pub SECBB2R1: RWRegister<u32>,
pub SECBB2R2: RWRegister<u32>,
pub SECBB2R3: RWRegister<u32>,
pub SECBB2R4: RWRegister<u32>,
pub SECHDPCR: RWRegister<u32>,
pub PRIVCFGR: RWRegister<u32>,
// some fields omitted
}
Fields
ACR: RWRegister<u32>
Access control register
PDKEYR: WORegister<u32>
Power down key register
NSKEYR: WORegister<u32>
Flash non-secure key register
SECKEYR: WORegister<u32>
Flash secure key register
OPTKEYR: WORegister<u32>
Flash option key register
LVEKEYR: WORegister<u32>
Flash low voltage key register
NSSR: RWRegister<u32>
Flash status register
SECSR: RWRegister<u32>
Flash status register
NSCR: RWRegister<u32>
Flash non-secure control register
SECCR: RWRegister<u32>
Flash secure control register
ECCR: RWRegister<u32>
Flash ECC register
OPTR: RWRegister<u32>
Flash option register
NSBOOTADD0R: WORegister<u32>
Flash non-secure boot address 0 register
NSBOOTADD1R: WORegister<u32>
Flash non-secure boot address 1 register
SECBOOTADD0R: RWRegister<u32>
FFlash secure boot address 0 register
SECWM1R1: RWRegister<u32>
Flash bank 1 secure watermak1 register
SECWM1R2: RWRegister<u32>
Flash secure watermak1 register 2
WRP1AR: RWRegister<u32>
Flash Bank 1 WRP area A address register
WRP1BR: RWRegister<u32>
Flash Bank 1 WRP area B address register
SECWM2R1: RWRegister<u32>
Flash secure watermak2 register
SECWM2R2: RWRegister<u32>
Flash secure watermak2 register2
WRP2AR: RWRegister<u32>
Flash WPR2 area A address register
WRP2BR: RWRegister<u32>
Flash WPR2 area B address register
SECBB1R1: RWRegister<u32>
FLASH secure block based bank 1 register
SECBB1R2: RWRegister<u32>
FLASH secure block based bank 1 register
SECBB1R3: RWRegister<u32>
FLASH secure block based bank 1 register
SECBB1R4: RWRegister<u32>
FLASH secure block based bank 1 register
SECBB2R1: RWRegister<u32>
FLASH secure block based bank 2 register
SECBB2R2: RWRegister<u32>
FLASH secure block based bank 2 register
SECBB2R3: RWRegister<u32>
FLASH secure block based bank 2 register
SECBB2R4: RWRegister<u32>
FLASH secure block based bank 2 register
SECHDPCR: RWRegister<u32>
FLASH secure HDP control register
PRIVCFGR: RWRegister<u32>
Power privilege configuration register