Struct stm32ral::stm32l5::peripherals::fdcan1::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 37 fields
pub FDCAN_CREL: RORegister<u32>,
pub FDCAN_ENDN: RORegister<u32>,
pub FDCAN_DBTP: RWRegister<u32>,
pub FDCAN_TEST: RWRegister<u32>,
pub FDCAN_RWD: RWRegister<u32>,
pub FDCAN_CCCR: RWRegister<u32>,
pub FDCAN_NBTP: RWRegister<u32>,
pub FDCAN_TSCC: RWRegister<u32>,
pub FDCAN_TSCV: RWRegister<u32>,
pub FDCAN_TOCC: RWRegister<u32>,
pub FDCAN_TOCV: RWRegister<u32>,
pub FDCAN_ECR: RWRegister<u32>,
pub FDCAN_PSR: RWRegister<u32>,
pub FDCAN_TDCR: RWRegister<u32>,
pub FDCAN_IR: RWRegister<u32>,
pub FDCAN_IE: RWRegister<u32>,
pub FDCAN_ILS: RWRegister<u32>,
pub FDCAN_ILE: RWRegister<u32>,
pub FDCAN_RXGFC: RWRegister<u32>,
pub FDCAN_XIDAM: RWRegister<u32>,
pub FDCAN_HPMS: RORegister<u32>,
pub FDCAN_RXF0S: RWRegister<u32>,
pub FDCAN_RXF0A: RWRegister<u32>,
pub FDCAN_RXF1S: RWRegister<u32>,
pub FDCAN_RXF1A: RWRegister<u32>,
pub FDCAN_TXBC: RWRegister<u32>,
pub FDCAN_TXFQS: RORegister<u32>,
pub FDCAN_TXBRP: RORegister<u32>,
pub FDCAN_TXBAR: RWRegister<u32>,
pub FDCAN_TXBCR: RWRegister<u32>,
pub FDCAN_TXBTO: RORegister<u32>,
pub FDCAN_TXBCF: RORegister<u32>,
pub FDCAN_TXBTIE: RWRegister<u32>,
pub FDCAN_TXBCIE: RWRegister<u32>,
pub FDCAN_TXEFS: RORegister<u32>,
pub FDCAN_TXEFA: RWRegister<u32>,
pub FDCAN_CKDIV: RWRegister<u32>,
// some fields omitted
}
Fields
FDCAN_CREL: RORegister<u32>
FDCAN Core Release Register
FDCAN_ENDN: RORegister<u32>
FDCAN Core Release Register
FDCAN_DBTP: RWRegister<u32>
FDCAN Data Bit Timing and Prescaler Register
FDCAN_TEST: RWRegister<u32>
FDCAN Test Register
FDCAN_RWD: RWRegister<u32>
FDCAN RAM Watchdog Register
FDCAN_CCCR: RWRegister<u32>
FDCAN CC Control Register
FDCAN_NBTP: RWRegister<u32>
FDCAN Nominal Bit Timing and Prescaler Register
FDCAN_TSCC: RWRegister<u32>
FDCAN Timestamp Counter Configuration Register
FDCAN_TSCV: RWRegister<u32>
FDCAN Timestamp Counter Value Register
FDCAN_TOCC: RWRegister<u32>
FDCAN Timeout Counter Configuration Register
FDCAN_TOCV: RWRegister<u32>
FDCAN Timeout Counter Value Register
FDCAN_ECR: RWRegister<u32>
FDCAN Error Counter Register
FDCAN_PSR: RWRegister<u32>
FDCAN Protocol Status Register
FDCAN_TDCR: RWRegister<u32>
FDCAN Transmitter Delay Compensation Register
FDCAN_IR: RWRegister<u32>
FDCAN Interrupt Register
FDCAN_IE: RWRegister<u32>
FDCAN Interrupt Enable Register
FDCAN_ILS: RWRegister<u32>
FDCAN Interrupt Line Select Register
FDCAN_ILE: RWRegister<u32>
FDCAN Interrupt Line Enable Register
FDCAN_RXGFC: RWRegister<u32>
FDCAN Global Filter Configuration Register
FDCAN_XIDAM: RWRegister<u32>
FDCAN Extended ID and Mask Register
FDCAN_HPMS: RORegister<u32>
FDCAN High Priority Message Status Register
FDCAN_RXF0S: RWRegister<u32>
FDCAN Rx FIFO 0 Status Register
FDCAN_RXF0A: RWRegister<u32>
CAN Rx FIFO 0 Acknowledge Register
FDCAN_RXF1S: RWRegister<u32>
FDCAN Rx FIFO 1 Status Register
FDCAN_RXF1A: RWRegister<u32>
FDCAN Rx FIFO 1 Acknowledge Register
FDCAN_TXBC: RWRegister<u32>
FDCAN Tx buffer configuration register
FDCAN_TXFQS: RORegister<u32>
FDCAN Tx FIFO/Queue Status Register
FDCAN_TXBRP: RORegister<u32>
FDCAN Tx Buffer Request Pending Register
FDCAN_TXBAR: RWRegister<u32>
FDCAN Tx Buffer Add Request Register
FDCAN_TXBCR: RWRegister<u32>
FDCAN Tx Buffer Cancellation Request Register
FDCAN_TXBTO: RORegister<u32>
FDCAN Tx Buffer Transmission Occurred Register
FDCAN_TXBCF: RORegister<u32>
FDCAN Tx Buffer Cancellation Finished Register
FDCAN_TXBTIE: RWRegister<u32>
FDCAN Tx Buffer Transmission Interrupt Enable Register
FDCAN_TXBCIE: RWRegister<u32>
FDCAN Tx Buffer Cancellation Finished Interrupt Enable Register
FDCAN_TXEFS: RORegister<u32>
FDCAN Tx Event FIFO Status Register
FDCAN_TXEFA: RWRegister<u32>
FDCAN Tx Event FIFO Acknowledge Register
FDCAN_CKDIV: RWRegister<u32>
FDCAN TT Trigger Memory Configuration Register