Struct stm32ral::stm32h7::peripherals::flash_v2::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 39 fields
pub ACR: RWRegister<u32>,
pub KEYR1: WORegister<u32>,
pub OPTKEYR: WORegister<u32>,
pub CR1: RWRegister<u32>,
pub SR1: RWRegister<u32>,
pub CCR1: RWRegister<u32>,
pub OPTCR: RWRegister<u32>,
pub OPTSR_CUR: RWRegister<u32>,
pub OPTSR_PRG: RWRegister<u32>,
pub OPTCCR: RWRegister<u32>,
pub PRAR_CUR1: RWRegister<u32>,
pub PRAR_PRG1: RWRegister<u32>,
pub SCAR_CUR1: RWRegister<u32>,
pub SCAR_PRG1: RWRegister<u32>,
pub WPSN_CURR1: RWRegister<u32>,
pub WPSN_PRGR1: RWRegister<u32>,
pub BOOT7_CURR: RWRegister<u32>,
pub BOOT7_PRGR: RWRegister<u32>,
pub BOOT4_CURR: RWRegister<u32>,
pub BOOT4_PRGR: RWRegister<u32>,
pub CRCCR1: RWRegister<u32>,
pub CRCSADDR1: RWRegister<u32>,
pub CRCEADDR1: RWRegister<u32>,
pub CRCDATAR: RWRegister<u32>,
pub FAR1: RWRegister<u32>,
pub KEYR2: WORegister<u32>,
pub CR2: RWRegister<u32>,
pub SR2: RWRegister<u32>,
pub CCR2: RWRegister<u32>,
pub PRAR_CUR2: RWRegister<u32>,
pub PRAR_PRG2: RWRegister<u32>,
pub SCAR_CUR2: RWRegister<u32>,
pub SCAR_PRG2: RWRegister<u32>,
pub WPSN_CURR2: RWRegister<u32>,
pub WPSN_PRGR2: RWRegister<u32>,
pub CRCCR2: RWRegister<u32>,
pub CRCSADDR2: RWRegister<u32>,
pub CRCEADDR2: RWRegister<u32>,
pub FAR2: RWRegister<u32>,
// some fields omitted
}
Fields
ACR: RWRegister<u32>
FLASH access control register
KEYR1: WORegister<u32>
FLASH key register for bank 1
OPTKEYR: WORegister<u32>
FLASH option key register
CR1: RWRegister<u32>
FLASH control register for bank 1
SR1: RWRegister<u32>
FLASH status register for bank 1
CCR1: RWRegister<u32>
FLASH clear control register for bank 1
OPTCR: RWRegister<u32>
FLASH option control register
OPTSR_CUR: RWRegister<u32>
FLASH option status register
OPTSR_PRG: RWRegister<u32>
FLASH option status register
OPTCCR: RWRegister<u32>
FLASH option clear control register
PRAR_CUR1: RWRegister<u32>
FLASH protection address for bank 1
PRAR_PRG1: RWRegister<u32>
FLASH protection address for bank 1
SCAR_CUR1: RWRegister<u32>
FLASH secure address for bank 1
SCAR_PRG1: RWRegister<u32>
FLASH secure address for bank 1
WPSN_CURR1: RWRegister<u32>
FLASH write sector protection for bank 1
WPSN_PRGR1: RWRegister<u32>
FLASH write sector protection for bank 1
BOOT7_CURR: RWRegister<u32>
FLASH register boot address for Arm Cortex-M7 core
BOOT7_PRGR: RWRegister<u32>
FLASH register boot address for Arm Cortex-M7 core
BOOT4_CURR: RWRegister<u32>
FLASH register boot address for Arm Cortex-M4 core
BOOT4_PRGR: RWRegister<u32>
FLASH register boot address for Arm Cortex-M4 core
CRCCR1: RWRegister<u32>
FLASH CRC control register for bank 1
CRCSADDR1: RWRegister<u32>
FLASH CRC start address register for bank 1
CRCEADDR1: RWRegister<u32>
FLASH CRC end address register for bank 1
CRCDATAR: RWRegister<u32>
FLASH CRC data register
FAR1: RWRegister<u32>
FLASH ECC fail address for bank 1
KEYR2: WORegister<u32>
FLASH key register for bank 1
CR2: RWRegister<u32>
FLASH control register for bank 1
SR2: RWRegister<u32>
FLASH status register for bank 1
CCR2: RWRegister<u32>
FLASH clear control register for bank 1
PRAR_CUR2: RWRegister<u32>
FLASH protection address for bank 1
PRAR_PRG2: RWRegister<u32>
FLASH protection address for bank 1
SCAR_CUR2: RWRegister<u32>
FLASH secure address for bank 1
SCAR_PRG2: RWRegister<u32>
FLASH secure address for bank 1
WPSN_CURR2: RWRegister<u32>
FLASH write sector protection for bank 1
WPSN_PRGR2: RWRegister<u32>
FLASH write sector protection for bank 1
CRCCR2: RWRegister<u32>
FLASH CRC control register for bank 1
CRCSADDR2: RWRegister<u32>
FLASH CRC start address register for bank 1
CRCEADDR2: RWRegister<u32>
FLASH CRC end address register for bank 1
FAR2: RWRegister<u32>
FLASH ECC fail address for bank 1