Struct stm32ral::stm32h7::peripherals::dma2d::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 20 fields
pub CR: RWRegister<u32>,
pub ISR: RORegister<u32>,
pub IFCR: RWRegister<u32>,
pub FGMAR: UnsafeRWRegister<u32>,
pub FGOR: RWRegister<u32>,
pub BGMAR: UnsafeRWRegister<u32>,
pub BGOR: RWRegister<u32>,
pub FGPFCCR: RWRegister<u32>,
pub FGCOLR: RWRegister<u32>,
pub BGPFCCR: RWRegister<u32>,
pub BGCOLR: RWRegister<u32>,
pub FGCMAR: UnsafeRWRegister<u32>,
pub BGCMAR: UnsafeRWRegister<u32>,
pub OPFCCR: RWRegister<u32>,
pub OCOLR: RWRegister<u32>,
pub OMAR: UnsafeRWRegister<u32>,
pub OOR: RWRegister<u32>,
pub NLR: RWRegister<u32>,
pub LWR: RWRegister<u32>,
pub AMTCR: RWRegister<u32>,
}
Fields
CR: RWRegister<u32>
DMA2D control register
ISR: RORegister<u32>
DMA2D Interrupt Status Register
IFCR: RWRegister<u32>
DMA2D interrupt flag clear register
FGMAR: UnsafeRWRegister<u32>
DMA2D foreground memory address register
FGOR: RWRegister<u32>
DMA2D foreground offset register
BGMAR: UnsafeRWRegister<u32>
DMA2D background memory address register
BGOR: RWRegister<u32>
DMA2D background offset register
FGPFCCR: RWRegister<u32>
DMA2D foreground PFC control register
FGCOLR: RWRegister<u32>
DMA2D foreground color register
BGPFCCR: RWRegister<u32>
DMA2D background PFC control register
BGCOLR: RWRegister<u32>
DMA2D background color register
FGCMAR: UnsafeRWRegister<u32>
DMA2D foreground CLUT memory address register
BGCMAR: UnsafeRWRegister<u32>
DMA2D background CLUT memory address register
OPFCCR: RWRegister<u32>
DMA2D output PFC control register
OCOLR: RWRegister<u32>
DMA2D output color register
OMAR: UnsafeRWRegister<u32>
DMA2D output memory address register
OOR: RWRegister<u32>
DMA2D output offset register
NLR: RWRegister<u32>
DMA2D number of line register
LWR: RWRegister<u32>
DMA2D line watermark register
AMTCR: RWRegister<u32>
DMA2D AXI master timer configuration register