Struct stm32ral::stm32g0::stm32g031::rcc::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 22 fields
pub CR: RWRegister<u32>,
pub ICSCR: RWRegister<u32>,
pub CFGR: RWRegister<u32>,
pub PLLSYSCFGR: RWRegister<u32>,
pub CIER: RWRegister<u32>,
pub CIFR: RORegister<u32>,
pub CICR: WORegister<u32>,
pub IOPRSTR: RWRegister<u32>,
pub AHBRSTR: RWRegister<u32>,
pub APBRSTR1: RWRegister<u32>,
pub APBRSTR2: RWRegister<u32>,
pub IOPENR: RWRegister<u32>,
pub AHBENR: RWRegister<u32>,
pub APBENR1: RWRegister<u32>,
pub APBENR2: RWRegister<u32>,
pub IOPSMENR: RWRegister<u32>,
pub AHBSMENR: RWRegister<u32>,
pub APBSMENR1: RWRegister<u32>,
pub APBSMENR2: RWRegister<u32>,
pub CCIPR: RWRegister<u32>,
pub BDCR: RWRegister<u32>,
pub CSR: RWRegister<u32>,
// some fields omitted
}
Fields
CR: RWRegister<u32>
Clock control register
ICSCR: RWRegister<u32>
Internal clock sources calibration register
CFGR: RWRegister<u32>
Clock configuration register
PLLSYSCFGR: RWRegister<u32>
PLL configuration register
CIER: RWRegister<u32>
Clock interrupt enable register
CIFR: RORegister<u32>
Clock interrupt flag register
CICR: WORegister<u32>
Clock interrupt clear register
IOPRSTR: RWRegister<u32>
GPIO reset register
AHBRSTR: RWRegister<u32>
AHB peripheral reset register
APBRSTR1: RWRegister<u32>
APB peripheral reset register 1
APBRSTR2: RWRegister<u32>
APB peripheral reset register 2
IOPENR: RWRegister<u32>
GPIO clock enable register
AHBENR: RWRegister<u32>
AHB peripheral clock enable register
APBENR1: RWRegister<u32>
APB peripheral clock enable register 1
APBENR2: RWRegister<u32>
APB peripheral clock enable register 2
IOPSMENR: RWRegister<u32>
GPIO in Sleep mode clock enable register
AHBSMENR: RWRegister<u32>
AHB peripheral clock enable in Sleep mode register
APBSMENR1: RWRegister<u32>
APB peripheral clock enable in Sleep mode register 1
APBSMENR2: RWRegister<u32>
APB peripheral clock enable in Sleep mode register 2
CCIPR: RWRegister<u32>
Peripherals independent clock configuration register
BDCR: RWRegister<u32>
RTC domain control register
CSR: RWRegister<u32>
Control/status register