Struct stm32ral::stm32f4::stm32f427::dma2d::RegisterBlock[][src]

#[repr(C)]
pub struct RegisterBlock {
Show 20 fields pub DMA2D_CR: RWRegister<u32>, pub DMA2D_ISR: RORegister<u32>, pub DMA2D_IFCR: RWRegister<u32>, pub DMA2D_FGMAR: RWRegister<u32>, pub DMA2D_FGOR: RWRegister<u32>, pub DMA2D_BGMAR: RWRegister<u32>, pub DMA2D_BGOR: RWRegister<u32>, pub DMA2D_FGPFCCR: RWRegister<u32>, pub DMA2D_FGCOLR: RWRegister<u32>, pub DMA2D_BGPFCCR: RWRegister<u32>, pub DMA2D_BGCOLR: RWRegister<u32>, pub DMA2D_FGCMAR: RWRegister<u32>, pub DMA2D_BGCMAR: RWRegister<u32>, pub DMA2D_OPFCCR: RWRegister<u32>, pub DMA2D_OCOLR: RWRegister<u32>, pub DMA2D_OMAR: RWRegister<u32>, pub DMA2D_OOR: RWRegister<u32>, pub DMA2D_NLR: RWRegister<u32>, pub DMA2D_LWR: RWRegister<u32>, pub DMA2D_AMTCR: RWRegister<u32>,
}

Fields

DMA2D_CR: RWRegister<u32>

DMA2D control register

DMA2D_ISR: RORegister<u32>

DMA2D Interrupt Status Register

DMA2D_IFCR: RWRegister<u32>

DMA2D interrupt flag clear register

DMA2D_FGMAR: RWRegister<u32>

DMA2D foreground memory address register

DMA2D_FGOR: RWRegister<u32>

DMA2D foreground offset register

DMA2D_BGMAR: RWRegister<u32>

DMA2D background memory address register

DMA2D_BGOR: RWRegister<u32>

DMA2D background offset register

DMA2D_FGPFCCR: RWRegister<u32>

DMA2D foreground PFC control register

DMA2D_FGCOLR: RWRegister<u32>

DMA2D foreground color register

DMA2D_BGPFCCR: RWRegister<u32>

DMA2D background PFC control register

DMA2D_BGCOLR: RWRegister<u32>

DMA2D background color register

DMA2D_FGCMAR: RWRegister<u32>

DMA2D foreground CLUT memory address register

DMA2D_BGCMAR: RWRegister<u32>

DMA2D background CLUT memory address register

DMA2D_OPFCCR: RWRegister<u32>

DMA2D output PFC control register

DMA2D_OCOLR: RWRegister<u32>

DMA2D output color register

DMA2D_OMAR: RWRegister<u32>

DMA2D output memory address register

DMA2D_OOR: RWRegister<u32>

DMA2D output offset register

DMA2D_NLR: RWRegister<u32>

DMA2D number of line register

DMA2D_LWR: RWRegister<u32>

DMA2D line watermark register

DMA2D_AMTCR: RWRegister<u32>

DMA2D AXI master timer configuration register

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The type returned in the event of a conversion error.

Performs the conversion.