Struct stm32ral::stm32f3::peripherals::can::RegisterBlock [−][src]
#[repr(C)]pub struct RegisterBlock {Show 89 fields
pub MCR: RWRegister<u32>,
pub MSR: RWRegister<u32>,
pub TSR: RWRegister<u32>,
pub RF0R: RWRegister<u32>,
pub RF1R: RWRegister<u32>,
pub IER: RWRegister<u32>,
pub ESR: RWRegister<u32>,
pub BTR: RWRegister<u32>,
pub TIR0: RWRegister<u32>,
pub TDTR0: RWRegister<u32>,
pub TDLR0: RWRegister<u32>,
pub TDHR0: RWRegister<u32>,
pub TIR1: RWRegister<u32>,
pub TDTR1: RWRegister<u32>,
pub TDLR1: RWRegister<u32>,
pub TDHR1: RWRegister<u32>,
pub TIR2: RWRegister<u32>,
pub TDTR2: RWRegister<u32>,
pub TDLR2: RWRegister<u32>,
pub TDHR2: RWRegister<u32>,
pub RIR0: RORegister<u32>,
pub RDTR0: RORegister<u32>,
pub RDLR0: RORegister<u32>,
pub RDHR0: RORegister<u32>,
pub RIR1: RORegister<u32>,
pub RDTR1: RORegister<u32>,
pub RDLR1: RORegister<u32>,
pub RDHR1: RORegister<u32>,
pub FMR: RWRegister<u32>,
pub FM1R: RWRegister<u32>,
pub FS1R: RWRegister<u32>,
pub FFA1R: RWRegister<u32>,
pub FA1R: RWRegister<u32>,
pub FR10: RWRegister<u32>,
pub FR20: RWRegister<u32>,
pub FR11: RWRegister<u32>,
pub FR21: RWRegister<u32>,
pub FR12: RWRegister<u32>,
pub FR22: RWRegister<u32>,
pub FR13: RWRegister<u32>,
pub FR23: RWRegister<u32>,
pub FR14: RWRegister<u32>,
pub FR24: RWRegister<u32>,
pub FR15: RWRegister<u32>,
pub FR25: RWRegister<u32>,
pub FR16: RWRegister<u32>,
pub FR26: RWRegister<u32>,
pub FR17: RWRegister<u32>,
pub FR27: RWRegister<u32>,
pub FR18: RWRegister<u32>,
pub FR28: RWRegister<u32>,
pub FR19: RWRegister<u32>,
pub FR29: RWRegister<u32>,
pub FR110: RWRegister<u32>,
pub FR210: RWRegister<u32>,
pub FR111: RWRegister<u32>,
pub FR211: RWRegister<u32>,
pub FR112: RWRegister<u32>,
pub FR212: RWRegister<u32>,
pub FR113: RWRegister<u32>,
pub FR213: RWRegister<u32>,
pub FR114: RWRegister<u32>,
pub FR214: RWRegister<u32>,
pub FR115: RWRegister<u32>,
pub FR215: RWRegister<u32>,
pub FR116: RWRegister<u32>,
pub FR216: RWRegister<u32>,
pub FR117: RWRegister<u32>,
pub FR217: RWRegister<u32>,
pub FR118: RWRegister<u32>,
pub FR218: RWRegister<u32>,
pub FR119: RWRegister<u32>,
pub FR219: RWRegister<u32>,
pub FR120: RWRegister<u32>,
pub FR220: RWRegister<u32>,
pub FR121: RWRegister<u32>,
pub FR221: RWRegister<u32>,
pub FR122: RWRegister<u32>,
pub FR222: RWRegister<u32>,
pub FR123: RWRegister<u32>,
pub FR223: RWRegister<u32>,
pub FR124: RWRegister<u32>,
pub FR224: RWRegister<u32>,
pub FR125: RWRegister<u32>,
pub FR225: RWRegister<u32>,
pub FR126: RWRegister<u32>,
pub FR226: RWRegister<u32>,
pub FR127: RWRegister<u32>,
pub FR227: RWRegister<u32>,
// some fields omitted
}
Fields
MCR: RWRegister<u32>
master control register
MSR: RWRegister<u32>
master status register
TSR: RWRegister<u32>
transmit status register
RF0R: RWRegister<u32>
receive FIFO %s register
RF1R: RWRegister<u32>
receive FIFO %s register
IER: RWRegister<u32>
interrupt enable register
ESR: RWRegister<u32>
error status register
BTR: RWRegister<u32>
bit timing register
TIR0: RWRegister<u32>
TX mailbox identifier register
TDTR0: RWRegister<u32>
mailbox data length control and time stamp register
TDLR0: RWRegister<u32>
mailbox data low register
TDHR0: RWRegister<u32>
mailbox data high register
TIR1: RWRegister<u32>
TX mailbox identifier register
TDTR1: RWRegister<u32>
mailbox data length control and time stamp register
TDLR1: RWRegister<u32>
mailbox data low register
TDHR1: RWRegister<u32>
mailbox data high register
TIR2: RWRegister<u32>
TX mailbox identifier register
TDTR2: RWRegister<u32>
mailbox data length control and time stamp register
TDLR2: RWRegister<u32>
mailbox data low register
TDHR2: RWRegister<u32>
mailbox data high register
RIR0: RORegister<u32>
receive FIFO mailbox identifier register
RDTR0: RORegister<u32>
receive FIFO mailbox data length control and time stamp register
RDLR0: RORegister<u32>
receive FIFO mailbox data low register
RDHR0: RORegister<u32>
receive FIFO mailbox data high register
RIR1: RORegister<u32>
receive FIFO mailbox identifier register
RDTR1: RORegister<u32>
receive FIFO mailbox data length control and time stamp register
RDLR1: RORegister<u32>
receive FIFO mailbox data low register
RDHR1: RORegister<u32>
receive FIFO mailbox data high register
FMR: RWRegister<u32>
filter master register
FM1R: RWRegister<u32>
filter mode register
FS1R: RWRegister<u32>
filter scale register
FFA1R: RWRegister<u32>
filter FIFO assignment register
FA1R: RWRegister<u32>
CAN filter activation register
FR10: RWRegister<u32>
Filter bank 0 register 1
FR20: RWRegister<u32>
Filter bank 0 register 2
FR11: RWRegister<u32>
Filter bank 0 register 1
FR21: RWRegister<u32>
Filter bank 0 register 2
FR12: RWRegister<u32>
Filter bank 0 register 1
FR22: RWRegister<u32>
Filter bank 0 register 2
FR13: RWRegister<u32>
Filter bank 0 register 1
FR23: RWRegister<u32>
Filter bank 0 register 2
FR14: RWRegister<u32>
Filter bank 0 register 1
FR24: RWRegister<u32>
Filter bank 0 register 2
FR15: RWRegister<u32>
Filter bank 0 register 1
FR25: RWRegister<u32>
Filter bank 0 register 2
FR16: RWRegister<u32>
Filter bank 0 register 1
FR26: RWRegister<u32>
Filter bank 0 register 2
FR17: RWRegister<u32>
Filter bank 0 register 1
FR27: RWRegister<u32>
Filter bank 0 register 2
FR18: RWRegister<u32>
Filter bank 0 register 1
FR28: RWRegister<u32>
Filter bank 0 register 2
FR19: RWRegister<u32>
Filter bank 0 register 1
FR29: RWRegister<u32>
Filter bank 0 register 2
FR110: RWRegister<u32>
Filter bank 0 register 1
FR210: RWRegister<u32>
Filter bank 0 register 2
FR111: RWRegister<u32>
Filter bank 0 register 1
FR211: RWRegister<u32>
Filter bank 0 register 2
FR112: RWRegister<u32>
Filter bank 0 register 1
FR212: RWRegister<u32>
Filter bank 0 register 2
FR113: RWRegister<u32>
Filter bank 0 register 1
FR213: RWRegister<u32>
Filter bank 0 register 2
FR114: RWRegister<u32>
Filter bank 0 register 1
FR214: RWRegister<u32>
Filter bank 0 register 2
FR115: RWRegister<u32>
Filter bank 0 register 1
FR215: RWRegister<u32>
Filter bank 0 register 2
FR116: RWRegister<u32>
Filter bank 0 register 1
FR216: RWRegister<u32>
Filter bank 0 register 2
FR117: RWRegister<u32>
Filter bank 0 register 1
FR217: RWRegister<u32>
Filter bank 0 register 2
FR118: RWRegister<u32>
Filter bank 0 register 1
FR218: RWRegister<u32>
Filter bank 0 register 2
FR119: RWRegister<u32>
Filter bank 0 register 1
FR219: RWRegister<u32>
Filter bank 0 register 2
FR120: RWRegister<u32>
Filter bank 0 register 1
FR220: RWRegister<u32>
Filter bank 0 register 2
FR121: RWRegister<u32>
Filter bank 0 register 1
FR221: RWRegister<u32>
Filter bank 0 register 2
FR122: RWRegister<u32>
Filter bank 0 register 1
FR222: RWRegister<u32>
Filter bank 0 register 2
FR123: RWRegister<u32>
Filter bank 0 register 1
FR223: RWRegister<u32>
Filter bank 0 register 2
FR124: RWRegister<u32>
Filter bank 0 register 1
FR224: RWRegister<u32>
Filter bank 0 register 2
FR125: RWRegister<u32>
Filter bank 0 register 1
FR225: RWRegister<u32>
Filter bank 0 register 2
FR126: RWRegister<u32>
Filter bank 0 register 1
FR226: RWRegister<u32>
Filter bank 0 register 2
FR127: RWRegister<u32>
Filter bank 0 register 1
FR227: RWRegister<u32>
Filter bank 0 register 2