Struct stm32mp1::stm32mp157::sdmmc1::sdmmc_dtimer::SDMMC_DTIMER_SPEC

pub struct SDMMC_DTIMER_SPEC;

The SDMMC_DTIMER register contains the data timeout period, in card bus clock periods. A counter loads the value from the SDMMC_DTIMER register, and starts decrementing when the data path state machine (DPSM) enters the Wait_R or Busy state. If the timer reaches 0 while the DPSM is in either of these states, the timeout status flag is set.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see sdmmc_dtimer module

Trait Implementations

impl Readable for SDMMC_DTIMER_SPEC

read() method returns sdmmc_dtimer::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for SDMMC_DTIMER_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for SDMMC_DTIMER_SPEC

reset() method sets SDMMC_DTIMER to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for SDMMC_DTIMER_SPEC

write(|w| ..) method takes sdmmc_dtimer::W writer structure

type Writer = W

Writer type argument to write, et al.