Struct stm32mp1::stm32mp157::fdcan1::fdcan_ir::FDCAN_IR_SPEC

pub struct FDCAN_IR_SPEC;

The flags are set when one of the listed conditions is detected (edge-sensitive). The flags remain set until the Host clears them. A flag is cleared by writing a 1 to the corresponding bit position. Writing a 0 has no effect. A hard reset will clear the register. The configuration of IE controls whether an interrupt is generated. The configuration of ILS controls on which interrupt line an interrupt is signaled.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see fdcan_ir module

Trait Implementations

impl Readable for FDCAN_IR_SPEC

read() method returns fdcan_ir::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for FDCAN_IR_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for FDCAN_IR_SPEC

reset() method sets FDCAN_IR to value 0

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for FDCAN_IR_SPEC

write(|w| ..) method takes fdcan_ir::W writer structure

type Writer = W

Writer type argument to write, et al.