Struct RegisterBlock

#[repr(C)]
pub struct RegisterBlock { /* private fields */ }

Register block

Implementations

impl RegisterBlock

pub const fn cr(&self) -> &CR

0x00 - control register

pub const fn swtrigr(&self) -> &SWTRIGR

0x04 - software trigger register

pub const fn dhr12r(&self, n: usize) -> &DHR12R

0x08..0x10 - channel%s 12-bit right-aligned data holding register

`n` is the index of register in the array. `n == 0` corresponds to `DHR12R1` register.

pub fn dhr12r_iter(&self) -> impl Iterator<Item = &DHR12R>

Iterator for array of: 0x08..0x10 - channel%s 12-bit right-aligned data holding register

pub const fn dhr12r1(&self) -> &DHR12R

0x08 - channel1 12-bit right-aligned data holding register

pub const fn dhr12r2(&self) -> &DHR12R

0x14 - channel2 12-bit right-aligned data holding register

pub const fn dhr12l(&self, n: usize) -> &DHR12L

0x0c..0x14 - channel%s 12-bit left aligned data holding register

`n` is the index of register in the array. `n == 0` corresponds to `DHR12L1` register.

pub fn dhr12l_iter(&self) -> impl Iterator<Item = &DHR12L>

Iterator for array of: 0x0c..0x14 - channel%s 12-bit left aligned data holding register

pub const fn dhr12l1(&self) -> &DHR12L

0x0c - channel1 12-bit left aligned data holding register

pub const fn dhr12l2(&self) -> &DHR12L

0x18 - channel2 12-bit left aligned data holding register

pub const fn dhr8r(&self, n: usize) -> &DHR8R

0x10..0x18 - channel%s 8-bit right aligned data holding register

`n` is the index of register in the array. `n == 0` corresponds to `DHR8R1` register.

pub fn dhr8r_iter(&self) -> impl Iterator<Item = &DHR8R>

Iterator for array of: 0x10..0x18 - channel%s 8-bit right aligned data holding register

pub const fn dhr8r1(&self) -> &DHR8R

0x10 - channel1 8-bit right aligned data holding register

pub const fn dhr8r2(&self) -> &DHR8R

0x1c - channel2 8-bit right aligned data holding register

pub const fn dhr12rd(&self) -> &DHR12RD

0x20 - Dual DAC 12-bit right-aligned data holding register

pub const fn dhr12ld(&self) -> &DHR12LD

0x24 - DUAL DAC 12-bit left aligned data holding register

pub const fn dhr8rd(&self) -> &DHR8RD

0x28 - DUAL DAC 8-bit right aligned data holding register

pub const fn dor(&self, n: usize) -> &DOR

0x2c..0x34 - channel%s data output register

`n` is the index of register in the array. `n == 0` corresponds to `DOR1` register.

pub fn dor_iter(&self) -> impl Iterator<Item = &DOR>

Iterator for array of: 0x2c..0x34 - channel%s data output register

pub const fn dor1(&self) -> &DOR

0x2c - channel1 data output register

pub const fn dor2(&self) -> &DOR

0x30 - channel2 data output register

pub const fn sr(&self) -> &SR

0x34 - status register

pub const fn ccr(&self) -> &CCR

0x38 - calibration control register

pub const fn mcr(&self) -> &MCR

0x3c - mode control register

pub const fn shsr(&self, n: usize) -> &SHSR

0x40..0x48 - DAC channel%s sample and hold sample time register

`n` is the index of register in the array. `n == 0` corresponds to `SHSR1` register.

pub fn shsr_iter(&self) -> impl Iterator<Item = &SHSR>

Iterator for array of: 0x40..0x48 - DAC channel%s sample and hold sample time register

pub const fn shsr1(&self) -> &SHSR

0x40 - DAC channel1 sample and hold sample time register

pub const fn shsr2(&self) -> &SHSR

0x44 - DAC channel2 sample and hold sample time register

pub const fn shhr(&self) -> &SHHR

0x48 - Sample and Hold hold time register

pub const fn shrr(&self) -> &SHRR

0x4c - Sample and Hold refresh time register

Trait Implementations

impl Debug for RegisterBlock

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.