Type Definition stm32l4_stm32hal::stm32l4x5::rcc::ahb3smenr::R[][src]

type R = R<u32, AHB3SMENR>;
Expand description

Reader of register AHB3SMENR

Implementations

Bit 8 - QSPISMEN

Bit 0 - Flexible memory controller clocks enable during Sleep and Stop modes