Type Definition stm32l4_stm32hal::stm32l4x1::sdmmc::sta::R[][src]

type R = R<u32, STA>;
Expand description

Reader of register STA

Implementations

Bit 23 - CE-ATA command completion signal received for CMD61

Bit 22 - SDIO interrupt received

Bit 21 - Data available in receive FIFO

Bit 20 - Data available in transmit FIFO

Bit 19 - Receive FIFO empty

Bit 18 - Transmit FIFO empty

Bit 17 - Receive FIFO full

Bit 16 - Transmit FIFO full

Bit 15 - Receive FIFO half full: there are at least 8 words in the FIFO

Bit 14 - Transmit FIFO half empty: at least 8 words can be written into the FIFO

Bit 13 - Data receive in progress

Bit 12 - Data transmit in progress

Bit 11 - Command transfer in progress

Bit 10 - Data block sent/received (CRC check passed)

Bit 9 - Start bit not detected on all data signals in wide bus mode

Bit 8 - Data end (data counter, SDIDCOUNT, is zero)

Bit 7 - Command sent (no response required)

Bit 6 - Command response received (CRC check passed)

Bit 5 - Received FIFO overrun error

Bit 4 - Transmit FIFO underrun error

Bit 3 - Data timeout

Bit 2 - Command response timeout

Bit 1 - Data block sent/received (CRC check failed)

Bit 0 - Command response received (CRC check failed)