Type Definition stm32l4_stm32hal::stm32l4x1::rcc::ahb2smenr::R[][src]

type R = R<u32, AHB2SMENR>;
Expand description

Reader of register AHB2SMENR

Implementations

Bit 18 - Random Number Generator clocks enable during Sleep and Stop modes

Bit 16 - AES accelerator clocks enable during Sleep and Stop modes

Bit 13 - ADC clocks enable during Sleep and Stop modes

Bit 9 - SRAM2 interface clocks enable during Sleep and Stop modes

Bit 7 - IO port H clocks enable during Sleep and Stop modes

Bit 4 - IO port E clocks enable during Sleep and Stop modes

Bit 3 - IO port D clocks enable during Sleep and Stop modes

Bit 2 - IO port C clocks enable during Sleep and Stop modes

Bit 1 - IO port B clocks enable during Sleep and Stop modes

Bit 0 - IO port A clocks enable during Sleep and Stop modes