[][src]Enum stm32l0x1_hal::flash::FlashLatency

pub enum FlashLatency {
    _1_Clk,
    _0_Clk,
}

Flash latencies available for this chip

Variants

_1_Clk

Flash reads have a latency of 1 clock cycle

_0_Clk

Flash reads have a latency of 0 clock cycles

Implementations

impl FlashLatency[src]

pub unsafe fn set(&self, acr: &mut ACR)[src]

Use the ACR register to set the flash value according to the variant

This function is unsafe because it does not (cannot) check to see that the latency value being set is appropriate for the current VCore range and clock speed of the chip

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