[−][src]Enum stm32l0x1_hal::flash::FlashLatency
Flash latencies available for this chip
Variants
Flash reads have a latency of 1 clock cycle
Flash reads have a latency of 0 clock cycles
Implementations
impl FlashLatency
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pub unsafe fn set(&self, acr: &mut ACR)
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Use the ACR register to set the flash value according to the variant
This function is unsafe because it does not (cannot) check to see that the latency value being set is appropriate for the current VCore range and clock speed of the chip
Auto Trait Implementations
Blanket Implementations
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