Module stm32l0x1_hal::flash

Flash memory

This currently implements basic chip startup-related functions. You will probably not need to use this interface directly, as the Flash peripheral is mostly configured by Rcc::freeze

Structs

ACR	Opaque access control register
Flash	A constrained FLASH peripheral
PECR	Program and erase control register
PEKEYR	PECR unlock key register
PRGKEYR	Program and erase key register
SR	Status register

Enums

FlashError	Error states
FlashLatency	Flash latencies available for this chip
FlashStatus	Non-error flash read and write statuses

Traits

Latency

Couples the necessary flash latency to the VCore power range of the cpu