Struct stm32h7::stm32h743v::hrtim_tima::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 27 fields
pub timacr: Reg<TIMACR_SPEC>,
pub timaisr: Reg<TIMAISR_SPEC>,
pub timaicr: Reg<TIMAICR_SPEC>,
pub timadier5: Reg<TIMADIER5_SPEC>,
pub cntar: Reg<CNTAR_SPEC>,
pub perar: Reg<PERAR_SPEC>,
pub repar: Reg<REPAR_SPEC>,
pub cmp1ar: Reg<CMP1AR_SPEC>,
pub cmp1car: Reg<CMP1CAR_SPEC>,
pub cmp2ar: Reg<CMP2AR_SPEC>,
pub cmp3ar: Reg<CMP3AR_SPEC>,
pub cmp4ar: Reg<CMP4AR_SPEC>,
pub cpt1ar: Reg<CPT1AR_SPEC>,
pub cpt2ar: Reg<CPT2AR_SPEC>,
pub dtar: Reg<DTAR_SPEC>,
pub seta1r: Reg<SETA1R_SPEC>,
pub rsta1r: Reg<RSTA1R_SPEC>,
pub seta2r: Reg<SETA2R_SPEC>,
pub rsta2r: Reg<RSTA2R_SPEC>,
pub eefar1: Reg<EEFAR1_SPEC>,
pub eefar2: Reg<EEFAR2_SPEC>,
pub rstar: Reg<RSTAR_SPEC>,
pub chpar: Reg<CHPAR_SPEC>,
pub cpt1acr: Reg<CPT1ACR_SPEC>,
pub cpt2acr: Reg<CPT2ACR_SPEC>,
pub outar: Reg<OUTAR_SPEC>,
pub fltar: Reg<FLTAR_SPEC>,
}
Expand description
Register block
Fields
timacr: Reg<TIMACR_SPEC>
0x00 - Timerx Control Register
timaisr: Reg<TIMAISR_SPEC>
0x04 - Timerx Interrupt Status Register
timaicr: Reg<TIMAICR_SPEC>
0x08 - Timerx Interrupt Clear Register
timadier5: Reg<TIMADIER5_SPEC>
0x0c - TIMxDIER5
cntar: Reg<CNTAR_SPEC>
0x10 - Timerx Counter Register
perar: Reg<PERAR_SPEC>
0x14 - Timerx Period Register
repar: Reg<REPAR_SPEC>
0x18 - Timerx Repetition Register
cmp1ar: Reg<CMP1AR_SPEC>
0x1c - Timerx Compare 1 Register
cmp1car: Reg<CMP1CAR_SPEC>
0x20 - Timerx Compare 1 Compound Register
cmp2ar: Reg<CMP2AR_SPEC>
0x24 - Timerx Compare 2 Register
cmp3ar: Reg<CMP3AR_SPEC>
0x28 - Timerx Compare 3 Register
cmp4ar: Reg<CMP4AR_SPEC>
0x2c - Timerx Compare 4 Register
cpt1ar: Reg<CPT1AR_SPEC>
0x30 - Timerx Capture 1 Register
cpt2ar: Reg<CPT2AR_SPEC>
0x34 - Timerx Capture 2 Register
dtar: Reg<DTAR_SPEC>
0x38 - Timerx Deadtime Register
seta1r: Reg<SETA1R_SPEC>
0x3c - Timerx Output1 Set Register
rsta1r: Reg<RSTA1R_SPEC>
0x40 - Timerx Output1 Reset Register
seta2r: Reg<SETA2R_SPEC>
0x44 - Timerx Output2 Set Register
rsta2r: Reg<RSTA2R_SPEC>
0x48 - Timerx Output2 Reset Register
eefar1: Reg<EEFAR1_SPEC>
0x4c - Timerx External Event Filtering Register 1
eefar2: Reg<EEFAR2_SPEC>
0x50 - Timerx External Event Filtering Register 2
rstar: Reg<RSTAR_SPEC>
0x54 - TimerA Reset Register
chpar: Reg<CHPAR_SPEC>
0x58 - Timerx Chopper Register
cpt1acr: Reg<CPT1ACR_SPEC>
0x5c - Timerx Capture 2 Control Register
cpt2acr: Reg<CPT2ACR_SPEC>
0x60 - CPT2xCR
outar: Reg<OUTAR_SPEC>
0x64 - Timerx Output Register
fltar: Reg<FLTAR_SPEC>
0x68 - Timerx Fault Register
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more