Struct SEC_TIM5 

pub struct SEC_TIM5 { /* private fields */ }

General-purpose timers

Implementations

impl SEC_TIM5

pub const PTR: *const RegisterBlock = {0x50000c00 as *const stm32h573::tim5::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn cr1(&self) -> &CR1

0x00 - TIM5 control register 1

pub fn cr2(&self) -> &CR2

0x04 - TIM5 control register 2

pub fn smcr(&self) -> &SMCR

0x08 - TIM5 slave mode control register

pub fn dier(&self) -> &DIER

0x0c - TIM5 DMA/Interrupt enable register

pub fn sr(&self) -> &SR

0x10 - TIM5 status register

pub fn egr(&self) -> &EGR

0x14 - TIM5 event generation register

pub fn ccmr1_output(&self) -> &CCMR1_OUTPUT

0x18 - TIM5 capture/compare mode register 1 [alternate]

pub fn ccmr1_input(&self) -> &CCMR1_INPUT

0x18 - TIM5 capture/compare mode register 1 [alternate]

pub fn ccmr2_output(&self) -> &CCMR2_OUTPUT

0x1c - TIM5 capture/compare mode register 2 [alternate]

pub fn ccmr2_input(&self) -> &CCMR2_INPUT

0x1c - TIM5 capture/compare mode register 2 [alternate]

pub fn ccer(&self) -> &CCER

0x20 - TIM5 capture/compare enable register

pub fn cnt(&self) -> &CNT

0x24 - TIM5 counter

pub fn psc(&self) -> &PSC

0x28 - TIM5 prescaler

pub fn arr(&self) -> &ARR

0x2c - TIM5 auto-reload register

pub fn ccr(&self, n: usize) -> &CCR

0x34..0x44 - capture/compare register

`n` is the index of register in the array. `n == 0` corresponds to `CCR1` register.

pub fn ccr_iter(&self) -> impl Iterator<Item = &CCR>

Iterator for array of: 0x34..0x44 - capture/compare register

pub fn ccr1(&self) -> &CCR

0x34 - capture/compare register

pub fn ccr2(&self) -> &CCR

0x38 - capture/compare register

pub fn ccr3(&self) -> &CCR

0x3c - capture/compare register

pub fn ccr4(&self) -> &CCR

0x40 - capture/compare register

pub fn ecr(&self) -> &ECR

0x58 - TIM5 timer encoder control register

pub fn tisel(&self) -> &TISEL

0x5c - TIM5 timer input selection register

pub fn af1(&self) -> &AF1

0x60 - TIM5 alternate function register 1

pub fn af2(&self) -> &AF2

0x64 - TIM5 alternate function register 2

pub fn dcr(&self) -> &DCR

0x3dc - TIM5 DMA control register

pub fn dmar(&self) -> &DMAR

0x3e0 - TIM5 DMA address for full transfer

Trait Implementations

impl Debug for SEC_TIM5

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SEC_TIM5

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SEC_TIM5