Struct SEC_RCC 

pub struct SEC_RCC { /* private fields */ }

Reset and clock controller

Implementations

impl SEC_RCC

pub const PTR: *const RegisterBlock = {0x54020c00 as *const stm32h573::rcc::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn cr(&self) -> &CR

0x00 - RCC clock control register

pub fn hsicfgr(&self) -> &HSICFGR

0x10 - RCC HSI calibration register

pub fn crrcr(&self) -> &CRRCR

0x14 - RCC clock recovery RC register

pub fn csicfgr(&self) -> &CSICFGR

0x18 - RCC CSI calibration register

pub fn cfgr1(&self) -> &CFGR1

0x1c - RCC clock configuration register

pub fn cfgr2(&self) -> &CFGR2

0x20 - RCC CPU domain clock configuration register 2

pub fn pll1cfgr(&self) -> &PLL1CFGR

0x28 - RCC PLL clock source selection register

pub fn pll2cfgr(&self) -> &PLL2CFGR

0x2c - RCC PLL clock source selection register

pub fn pll3cfgr(&self) -> &PLL3CFGR

0x30 - RCC PLL clock source selection register

pub fn pll1divr(&self) -> &PLL1DIVR

0x34 - RCC PLL1 dividers register

pub fn pll1fracr(&self) -> &PLL1FRACR

0x38 - RCC PLL1 fractional divider register

pub fn pll2divr(&self) -> &PLL2DIVR

0x3c - RCC PLL1 dividers register

pub fn pll2fracr(&self) -> &PLL2FRACR

0x40 - RCC PLL2 fractional divider register

pub fn pll3divr(&self) -> &PLL3DIVR

0x44 - RCC PLL3 dividers register

pub fn pll3fracr(&self) -> &PLL3FRACR

0x48 - RCC PLL3 fractional divider register

pub fn cier(&self) -> &CIER

0x50 - RCC clock source interrupt enable register

pub fn cifr(&self) -> &CIFR

0x54 - RCC clock source interrupt flag register

pub fn cicr(&self) -> &CICR

0x58 - RCC clock source interrupt clear register

pub fn ahb1rstr(&self) -> &AHB1RSTR

0x60 - RCC AHB1 reset register

pub fn ahb2rstr(&self) -> &AHB2RSTR

0x64 - RCC AHB2 peripheral reset register

pub fn ahb4rstr(&self) -> &AHB4RSTR

0x6c - RCC AHB4 peripheral reset register

pub fn apb1lrstr(&self) -> &APB1LRSTR

0x74 - RCC APB1 peripheral low reset register

pub fn apb1hrstr(&self) -> &APB1HRSTR

0x78 - RCC APB1 peripheral high reset register

pub fn apb2rstr(&self) -> &APB2RSTR

0x7c - RCC APB2 peripheral reset register

pub fn apb3rstr(&self) -> &APB3RSTR

0x80 - RCC APB4 peripheral reset register

pub fn ahb1enr(&self) -> &AHB1ENR

0x88 - RCC AHB1 peripherals clock register

pub fn ahb2enr(&self) -> &AHB2ENR

0x8c - RCC AHB2 peripheral clock register

pub fn ahb4enr(&self) -> &AHB4ENR

0x94 - RCC AHB4 peripheral clock register

pub fn apb1lenr(&self) -> &APB1LENR

0x9c - RCC APB1 peripheral clock register

pub fn apb1henr(&self) -> &APB1HENR

0xa0 - RCC APB1 peripheral clock register

pub fn apb2enr(&self) -> &APB2ENR

0xa4 - RCC APB2 peripheral clock register

pub fn apb3enr(&self) -> &APB3ENR

0xa8 - RCC APB4 peripheral clock register

pub fn ahb1lpenr(&self) -> &AHB1LPENR

0xb0 - RCC AHB1 sleep clock register

pub fn ahb2lpenr(&self) -> &AHB2LPENR

0xb4 - RCC AHB2 sleep clock register

pub fn ahb4lpenr(&self) -> &AHB4LPENR

0xbc - RCC AHB4 sleep clock register

pub fn apb1llpenr(&self) -> &APB1LLPENR

0xc4 - RCC APB1 sleep clock register

pub fn apb1hlpenr(&self) -> &APB1HLPENR

0xc8 - RCC APB1 sleep clock register

pub fn apb2lpenr(&self) -> &APB2LPENR

0xcc - RCC APB2 sleep clock register

pub fn apb3lpenr(&self) -> &APB3LPENR

0xd0 - RCC APB4 sleep clock register

pub fn ccipr1(&self) -> &CCIPR1

0xd8 - RCC kernel clock configuration register

pub fn ccipr2(&self) -> &CCIPR2

0xdc - RCC kernel clock configuration register

pub fn ccipr3(&self) -> &CCIPR3

0xe0 - RCC kernel clock configuration register

pub fn ccipr4(&self) -> &CCIPR4

0xe4 - RCC kernel clock configuration register

pub fn ccipr5(&self) -> &CCIPR5

0xe8 - RCC kernel clock configuration register

pub fn bdcr(&self) -> &BDCR

0xf0 - RCC Backup domain control register

pub fn rsr(&self) -> &RSR

0xf4 - RCC reset status register

pub fn seccfgr(&self) -> &SECCFGR

0x110 - RCC secure configuration register

pub fn privcfgr(&self) -> &PRIVCFGR

0x114 - RCC privilege configuration register

Trait Implementations

impl Debug for SEC_RCC

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SEC_RCC

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SEC_RCC