Struct SEC_ADC1 

pub struct SEC_ADC1 { /* private fields */ }

Analog to digital converter

Implementations

impl SEC_ADC1

pub const PTR: *const RegisterBlock = {0x52028000 as *const stm32h562::adc1::RegisterBlock}

Pointer to the register block

pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

pub unsafe fn steal() -> Self

Steal an instance of this peripheral

Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>

pub fn isr(&self) -> &ISR

0x00 - ADC interrupt and status register

pub fn ier(&self) -> &IER

0x04 - ADC interrupt enable register

pub fn cr(&self) -> &CR

0x08 - ADC control register

pub fn cfgr(&self) -> &CFGR

0x0c - ADC configuration register

pub fn cfgr2(&self) -> &CFGR2

0x10 - ADC configuration register 2

pub fn smpr1(&self) -> &SMPR1

0x14 - ADC sample time register 1

pub fn smpr2(&self) -> &SMPR2

0x18 - ADC sample time register 2

pub fn tr1(&self) -> &TR1

0x20 - ADC watchdog threshold register 1

pub fn tr2(&self) -> &TR2

0x24 - ADC watchdog threshold register 2

pub fn tr3(&self) -> &TR3

0x28 - ADC watchdog threshold register 3

pub fn sqr1(&self) -> &SQR1

0x30 - ADC regular sequence register 1

pub fn sqr2(&self) -> &SQR2

0x34 - ADC regular sequence register 2

pub fn sqr3(&self) -> &SQR3

0x38 - ADC regular sequence register 3

pub fn sqr4(&self) -> &SQR4

0x3c - ADC regular sequence register 4

pub fn dr(&self) -> &DR

0x40 - ADC regular data register

pub fn jsqr(&self) -> &JSQR

0x4c - ADC injected sequence register

pub fn ofr(&self, n: usize) -> &OFR

0x60..0x70 - ADC offset %s register

`n` is the index of register in the array. `n == 0` corresponds to `OFR1` register.

pub fn ofr_iter(&self) -> impl Iterator<Item = &OFR>

Iterator for array of: 0x60..0x70 - ADC offset %s register

pub fn ofr1(&self) -> &OFR

0x60 - ADC offset 1 register

pub fn ofr2(&self) -> &OFR

0x64 - ADC offset 2 register

pub fn ofr3(&self) -> &OFR

0x68 - ADC offset 3 register

pub fn ofr4(&self) -> &OFR

0x6c - ADC offset 4 register

pub fn jdr(&self, n: usize) -> &JDR

0x80..0x90 - ADC injected channel %s data register

`n` is the index of register in the array. `n == 0` corresponds to `JDR1` register.

pub fn jdr_iter(&self) -> impl Iterator<Item = &JDR>

Iterator for array of: 0x80..0x90 - ADC injected channel %s data register

pub fn jdr1(&self) -> &JDR

0x80 - ADC injected channel 1 data register

pub fn jdr2(&self) -> &JDR

0x84 - ADC injected channel 2 data register

pub fn jdr3(&self) -> &JDR

0x88 - ADC injected channel 3 data register

pub fn jdr4(&self) -> &JDR

0x8c - ADC injected channel 4 data register

pub fn awd2cr(&self) -> &AWD2CR

0xa0 - ADC analog watchdog 2 configuration register

pub fn awd3cr(&self) -> &AWD3CR

0xa4 - ADC analog watchdog 3 configuration register

pub fn difsel(&self) -> &DIFSEL

0xb0 - ADC Differential mode selection register

pub fn calfact(&self) -> &CALFACT

0xb4 - ADC calibration factors

pub fn or(&self) -> &OR

0xc8 - ADC option register

Trait Implementations

impl Debug for SEC_ADC1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Deref for SEC_ADC1

type Target = RegisterBlock

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl Send for SEC_ADC1