pub enum HSLV0 {
Disabled = 0,
Enabled = 1,
}Expand description
Port x high-speed low-voltage configuration (y = 15 to 0) These bits are written by software to optimize the I/O speed when the I/O supply is low. Each bit is active only if the corresponding IO_VDD_HSLV/IO_VDDIO2_HSLV user option bit is set. It must be used only if the I/O supply voltage is below 2.7 V. Setting these bits when the I/O supply (VDD or VDDIO2) is higher than 2.7 V may be destructive. Note: Not all I/Os support the HSLV mode. Refer to the I/O structure in the corresponding datasheet for the list of I/Os supporting this feature. Other I/Os HSLV configuration must be kept at reset value. The bit is reserved and must be kept to reset value when the corresponding I/O is not available on the selected package.
Value on reset: 0
Variants§
Trait Implementations§
impl Copy for HSLV0
impl Eq for HSLV0
impl StructuralPartialEq for HSLV0
Auto Trait Implementations§
impl Freeze for HSLV0
impl RefUnwindSafe for HSLV0
impl Send for HSLV0
impl Sync for HSLV0
impl Unpin for HSLV0
impl UnwindSafe for HSLV0
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more