Enum Interrupt 

#[repr(u16)]
pub enum Interrupt {
    WWDG = 0,
    RTC = 2,
    RTC_S = 3,
    TAMP = 4,
    RAMCFG = 5,
    FLASH = 6,
    FLASH_S = 7,
    GTZC = 8,
    RCC = 9,
    RCC_S = 10,
    EXTI0 = 11,
    EXTI1 = 12,
    EXTI2 = 13,
    EXTI3 = 14,
    EXTI4 = 15,
    EXTI5 = 16,
    EXTI6 = 17,
    EXTI7 = 18,
    EXTI8 = 19,
    EXTI9 = 20,
    EXTI10 = 21,
    EXTI11 = 22,
    EXTI12 = 23,
    EXTI13 = 24,
    EXTI14 = 25,
    EXTI15 = 26,
    GPDMA1_CH0 = 27,
    GPDMA1_CH1 = 28,
    GPDMA1_CH2 = 29,
    GPDMA1_CH3 = 30,
    GPDMA1_CH4 = 31,
    GPDMA1_CH5 = 32,
    GPDMA1_CH6 = 33,
    GPDMA1_CH7 = 34,
    IWDG = 35,
    SAES = 36,
    ADC1 = 37,
    DAC1 = 38,
    FDCAN1_IT0 = 39,
    FDCAN1_IT1 = 40,
    TIM1_BRK_TERR_IERR = 41,
    TIM1_UPD = 42,
    TIM1_TRGI_COM_DIR_IDX = 43,
    TIM1_CC = 44,
    TIM2 = 45,
    TIM3 = 46,
    TIM4 = 47,
    TIM5 = 48,
    TIM6 = 49,
    TIM7 = 50,
    I2C1_EV = 51,
    I2C1_ERR = 52,
    I2C2_EV = 53,
    I2C2_ERR = 54,
    SPI1 = 55,
    SPI2 = 56,
    SPI3 = 57,
    USART1 = 58,
    USART2 = 59,
    USART3 = 60,
    UART4 = 61,
    UART5 = 62,
    LPUART1 = 63,
    LPTIM1 = 64,
    TIM8_BRK_TERR_IERR = 65,
    TIM8_UPD = 66,
    TIM8_TRGI_DIR_IDX = 67,
    TIM8_CC = 68,
    ADC2 = 69,
    LPTIM2 = 70,
    TIM15 = 71,
    USB_FS = 74,
    CRS = 75,
    UCPD1 = 76,
    FMC = 77,
    OCTOSPI1 = 78,
    SDMMC1 = 79,
    I2C3_EV = 80,
    I2C3_ERR = 81,
    SPI4 = 82,
    USART6 = 85,
    GPDMA2_CH0 = 90,
    GPDMA2_CH1 = 91,
    GPDMA2_CH2 = 92,
    GPDMA2_CH3 = 93,
    GPDMA2_CH4 = 94,
    GPDMA2_CH5 = 95,
    GPDMA2_CH6 = 96,
    GPDMA2_CH7 = 97,
    FPU = 103,
    ICACHE = 104,
    DCACHE = 105,
    DCMI_PSSI = 108,
    FDCAN2_IT0 = 109,
    FDCAN2_IT1 = 110,
    DTS_OR_DTS_WKUP = 113,
    RNG = 114,
    OTFDEC1 = 115,
    AES = 116,
    HASH = 117,
    PKA = 118,
    CEC = 119,
    TIM12 = 120,
    I3C1_EV = 123,
    I3C1_ERR = 124,
    I3C2_EV = 131,
    I3C2_ERR = 132,
}

Enumeration of all the interrupts.

Variants

WWDG = 0

0 - Window Watchdog interrupt

RTC = 2

2 - RTC global non-secure interrupts

RTC_S = 3

3 - RTC global secure interrupts

TAMP = 4

4 - Tamper global interrupts

RAMCFG = 5

5 - RAM configuration global interrupt

FLASH = 6

6 - Flash non-secure global interrupt

FLASH_S = 7

7 - Flash secure global interrupt

GTZC = 8

8 - GTZC global interrupt

RCC = 9

9 - RCC non-secure global interrupt

RCC_S = 10

10 - RCC secure global interrupt

EXTI0 = 11

11 - EXTI Line0 interrupt

EXTI1 = 12

12 - EXTI Line1 interrupt

EXTI2 = 13

13 - EXTI Line2 interrupt

EXTI3 = 14

14 - EXTI Line3 interrupt

EXTI4 = 15

15 - EXTI Line4 interrupt

EXTI5 = 16

16 - EXTI Line5 interrupt

EXTI6 = 17

17 - EXTI Line6 interrupt

EXTI7 = 18

18 - EXTI Line7 interrupt

EXTI8 = 19

19 - EXTI Line8 interrupt

EXTI9 = 20

20 - EXTI Line9 interrupt

EXTI10 = 21

21 - EXTI Line10 interrupt

EXTI11 = 22

22 - EXTI Line11 interrupt

EXTI12 = 23

23 - EXTI Line12 interrupt

EXTI13 = 24

24 - EXTI Line13 interrupt

EXTI14 = 25

25 - EXTI Line14 interrupt

EXTI15 = 26

26 - EXTI Line15 interrupt

GPDMA1_CH0 = 27

27 - GPDMA1 channel0 global interrupt

GPDMA1_CH1 = 28

28 - GPDMA1 channel1 global interrupt

GPDMA1_CH2 = 29

29 - GPDMA1 channel2 global interrupt

GPDMA1_CH3 = 30

30 - GPDMA1 channel3 global interrupt

GPDMA1_CH4 = 31

31 - GPDMA1 channel4 global interrupt

GPDMA1_CH5 = 32

32 - GPDMA1 channel5 global interrupt

GPDMA1_CH6 = 33

33 - GPDMA1 channel6 global interrupt

GPDMA1_CH7 = 34

34 - GPDMA1 channel7 global interrupt

IWDG = 35

35 - Independent watchdog interrupt

SAES = 36

36 - Secure AES

ADC1 = 37

37 - ADC1 global interrupt

DAC1 = 38

38 - DAC1 global interrupt

FDCAN1_IT0 = 39

39 - FDCAN1 Interrupt 0

FDCAN1_IT1 = 40

40 - FDCAN1 Interrupt 1

TIM1_BRK_TERR_IERR = 41

41 - TIM1 Break/TIM1 Transition error/TIM1 Index error

TIM1_UPD = 42

42 - TIM1 Update

TIM1_TRGI_COM_DIR_IDX = 43

43 - TIM1 trigger and commutation/TIM1 Direction Change interrupt/TIM1 Index

TIM1_CC = 44

44 - TIM1 capture compare interrupt

TIM2 = 45

45 - TIM2 global interrupt

TIM3 = 46

46 - TIM3 global interrupt

TIM4 = 47

47 - TIM4 global interrupt

TIM5 = 48

48 - TIM5 global interrupt

TIM6 = 49

49 - TIM6 global interrupt

TIM7 = 50

50 - TIM7 global interrupt

I2C1_EV = 51

51 - I2C1 event interrupt

I2C1_ERR = 52

52 - I2C1 error interrupt

I2C2_EV = 53

53 - I2C2 event interrupt

I2C2_ERR = 54

54 - I2C2 error interrupt

SPI1 = 55

55 - SPI1 global interrupt

SPI2 = 56

56 - SPI2 global interrupt

SPI3 = 57

57 - SPI3 global interrupt

USART1 = 58

58 - USART1 global interrupt

USART2 = 59

59 - USART2 global interrupt

USART3 = 60

60 - USART3 global interrupt

UART4 = 61

61 - UART4 global interrupt

UART5 = 62

62 - UART5 global interrupt

LPUART1 = 63

63 - LPUART1 global interrupt OR LPUART1 R Wakeup OR LPUART1 T Wakeup Char(10)through EXTI line

LPTIM1 = 64

64 - LPTIM1 global interrupt OR LPTimer1 AIT through EXTI line

TIM8_BRK_TERR_IERR = 65

65 - TIM8 Break interrupt/TIM8 Transition error/TIM8 Index error

TIM8_UPD = 66

66 - TIM8 Update interrupt

TIM8_TRGI_DIR_IDX = 67

67 - TIM8 trigger and commutation interrupt/TIM8 Direction Change interrupt/TIM8 Index

TIM8_CC = 68

68 - TIM8 capture compare interrupt

ADC2 = 69

69 - ADC2 global interrupt

LPTIM2 = 70

70 - LPTIM2 global interrupt OR LPTimer2 AIT through EXTI line

TIM15 = 71

71 - TIM15 global interrupt

USB_FS = 74

74 - USB OTG FS global interrupt

CRS = 75

75 - Clock Recovery System global interrupt

UCPD1 = 76

76 - UCPD1 global interrupt

FMC = 77

77 - FMC global interrupt

OCTOSPI1 = 78

78 - OCTOSPI1 global interrupt

SDMMC1 = 79

79 - SDMMC1 global interrupt

I2C3_EV = 80

80 - I2C3 event interrupt

I2C3_ERR = 81

81 - I2C3 error interrupt

SPI4 = 82

82 - SPI4 global interrupt

USART6 = 85

85 - USART6 global interrupt

GPDMA2_CH0 = 90

90 - GPDMA2 channel0 global interrupt

GPDMA2_CH1 = 91

91 - GPDMA2 channel1 global interrupt

GPDMA2_CH2 = 92

92 - GPDMA2 channel2 global interrupt

GPDMA2_CH3 = 93

93 - GPDMA2 channe3 global interrupt

GPDMA2_CH4 = 94

94 - GPDMA2 channel4 global interrupt

GPDMA2_CH5 = 95

95 - GPDMA2 channel5 global interrupt

GPDMA2_CH6 = 96

96 - GPDMA2 channel6 global interrupt

GPDMA2_CH7 = 97

97 - GPDMA2 channel7 global interrupt

FPU = 103

103 - Floating point interrupt

ICACHE = 104

104 - Instruction cache global interrupt

DCACHE = 105

105 - Data cache global interrupt

DCMI_PSSI = 108

108 - DCMI/PSSI global interrupt

FDCAN2_IT0 = 109

109 - FDCAN2 Interrupt 0

FDCAN2_IT1 = 110

110 - FDCAN2 Interrupt 1

DTS_OR_DTS_WKUP = 113

113 - DTS interrupt OR DTS AIT through EXTI line

RNG = 114

114 - RNG global interrupt

OTFDEC1 = 115

115 - OTFDEC1 secure global interrupt

AES = 116

116 - AES global interrupt

HASH = 117

117 - HASH interrupt

PKA = 118

118 - PKA global interrupt

CEC = 119

119 - HDMI-CEC global interrupt

TIM12 = 120

120 - TIM12 global interrupt

I3C1_EV = 123

123 - I3C1 event interrupt

I3C1_ERR = 124

124 - I3C1 error interrupt

I3C2_EV = 131

131 - I3C2 event interrupt

I3C2_ERR = 132

132 - I3C2 error interrupt

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Format for Interrupt

fn format(&self, f: Formatter<'_>)

Writes the defmt representation of self to fmt.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt