Type Definition stm32g4::stm32g474::hrtim_master::mcr::W [−][src]
type W = W<u32, MCR>;
Writer for register MCR
Implementations
impl W
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pub fn brstdma(&mut self) -> BRSTDMA_W<'_>
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Bits 30:31 - Burst DMA Update
pub fn mrepu(&mut self) -> MREPU_W<'_>
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Bit 29 - Master Timer Repetition update
pub fn preen(&mut self) -> PREEN_W<'_>
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Bit 27 - Preload enable
pub fn dacsync(&mut self) -> DACSYNC_W<'_>
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Bits 25:26 - AC Synchronization
pub fn tfcen(&mut self) -> TFCEN_W<'_>
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Bit 22 - Timer F counter enable
pub fn tecen(&mut self) -> TECEN_W<'_>
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Bit 21 - Timer E counter enable
pub fn tdcen(&mut self) -> TDCEN_W<'_>
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Bit 20 - Timer D counter enable
pub fn tccen(&mut self) -> TCCEN_W<'_>
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Bit 19 - Timer C counter enable
pub fn tbcen(&mut self) -> TBCEN_W<'_>
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Bit 18 - Timer B counter enable
pub fn tacen(&mut self) -> TACEN_W<'_>
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Bit 17 - Timer A counter enable
pub fn mcen(&mut self) -> MCEN_W<'_>
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Bit 16 - Master Counter enable
pub fn sync_src(&mut self) -> SYNC_SRC_W<'_>
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Bits 14:15 - Synchronization source
pub fn sync_out(&mut self) -> SYNC_OUT_W<'_>
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Bits 12:13 - Synchronization output
pub fn syncstrtm(&mut self) -> SYNCSTRTM_W<'_>
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Bit 11 - Synchronization Starts Master
pub fn syncrstm(&mut self) -> SYNCRSTM_W<'_>
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Bit 10 - Synchronization Resets Master
pub fn sync_in(&mut self) -> SYNC_IN_W<'_>
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Bits 8:9 - synchronization input
pub fn intlvd(&mut self) -> INTLVD_W<'_>
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Bits 6:7 - Interleaved mode
pub fn half(&mut self) -> HALF_W<'_>
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Bit 5 - Half mode enable
pub fn retrig(&mut self) -> RETRIG_W<'_>
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Bit 4 - Master Re-triggerable mode
pub fn cont(&mut self) -> CONT_W<'_>
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Bit 3 - Master Continuous mode
pub fn ck_psc(&mut self) -> CK_PSC_W<'_>
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Bits 0:2 - HRTIM Master Clock prescaler