Type Definition stm32g4::stm32g441::dac1::dac_cr::W[][src]

type W = W<u32, DAC_CR>;

Writer for register DAC_CR

Implementations

impl W[src]

pub fn en1(&mut self) -> EN1_W<'_>[src]

Bit 0 - DAC channel1 enable This bit is set and cleared by software to enable/disable DAC channel1.

pub fn ten1(&mut self) -> TEN1_W<'_>[src]

Bit 1 - DAC channel1 trigger enable

pub fn tsel1(&mut self) -> TSEL1_W<'_>[src]

Bits 2:5 - DAC channel1 trigger selection These bits select the external event used to trigger DAC channel1. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

pub fn wave1(&mut self) -> WAVE1_W<'_>[src]

Bits 6:7 - DAC channel1 noise/triangle wave generation enable These bits are set and cleared by software. Note: Only used if bit TEN1 = 1 (DAC channel1 trigger enabled).

pub fn mamp1(&mut self) -> MAMP1_W<'_>[src]

Bits 8:11 - DAC channel1 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen1(&mut self) -> DMAEN1_W<'_>[src]

Bit 12 - DAC channel1 DMA enable This bit is set and cleared by software.

pub fn dmaudrie1(&mut self) -> DMAUDRIE1_W<'_>[src]

Bit 13 - DAC channel1 DMA Underrun Interrupt enable This bit is set and cleared by software.

pub fn cen1(&mut self) -> CEN1_W<'_>[src]

Bit 14 - DAC Channel 1 calibration enable This bit is set and cleared by software to enable/disable DAC channel 1 calibration, it can be written only if bit EN1=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.

pub fn en2(&mut self) -> EN2_W<'_>[src]

Bit 16 - DAC channel2 enable This bit is set and cleared by software to enable/disable DAC channel2.

pub fn ten2(&mut self) -> TEN2_W<'_>[src]

Bit 17 - DAC channel2 trigger enable

pub fn tsel2(&mut self) -> TSEL2_W<'_>[src]

Bits 18:21 - DAC channel2 trigger selection These bits select the external event used to trigger DAC channel2 Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled).

pub fn wave2(&mut self) -> WAVE2_W<'_>[src]

Bits 22:23 - DAC channel2 noise/triangle wave generation enable These bits are set/reset by software. 1x: Triangle wave generation enabled Note: Only used if bit TEN2 = 1 (DAC channel2 trigger enabled)

pub fn mamp2(&mut self) -> MAMP2_W<'_>[src]

Bits 24:27 - DAC channel2 mask/amplitude selector These bits are written by software to select mask in wave generation mode or amplitude in triangle generation mode. = 1011: Unmask bits[11:0] of LFSR/ triangle amplitude equal to 4095

pub fn dmaen2(&mut self) -> DMAEN2_W<'_>[src]

Bit 28 - DAC channel2 DMA enable This bit is set and cleared by software.

pub fn dmaudrie2(&mut self) -> DMAUDRIE2_W<'_>[src]

Bit 29 - DAC channel2 DMA underrun interrupt enable This bit is set and cleared by software.

pub fn cen2(&mut self) -> CEN2_W<'_>[src]

Bit 30 - DAC Channel 2 calibration enable This bit is set and cleared by software to enable/disable DAC channel 2 calibration, it can be written only if bit EN2=0 into DAC_CR (the calibration mode can be entered/exit only when the DAC channel is disabled) Otherwise, the write operation is ignored.