Enum ADVREGEN

pub enum ADVREGEN {
    Disabled = 0,
    Enabled = 1,
}

ADC Voltage Regulator Enable This bit is set by software, to enable the ADC internal voltage regulator. The voltage regulator output is available after tADCVREG_SETUP. It is cleared by software to disable the voltage regulator. It can be cleared only if ADEN is et to 0. Note: The software is allowed to program this bit field only when the ADC is disabled (ADCAL=0, ADSTART=0, ADSTP=0, ADDIS=0 and ADEN=0).

Value on reset: 0

Variants

Disabled = 0

0: ADC voltage regulator disabled

Enabled = 1

1: ADC voltage regulator enabled

Trait Implementations

impl Clone for ADVREGEN

fn clone(&self) -> ADVREGEN

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for ADVREGEN

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Format for ADVREGEN

fn format(&self, f: Formatter<'_>)

Writes the defmt representation of self to fmt.

impl From<ADVREGEN> for bool

fn from(variant: ADVREGEN) -> Self

Converts to this type from the input type.

impl PartialEq for ADVREGEN

fn eq(&self, other: &ADVREGEN) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for ADVREGEN

impl Eq for ADVREGEN

impl StructuralPartialEq for ADVREGEN