Type Alias W

Source
pub type W = W<CFGR2rs>;
Expand description

Register CFGR2 writer

Aliased Type§

pub struct W { /* private fields */ }

Implementations§

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impl W

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pub fn ovse(&mut self) -> OVSE_W<'_, CFGR2rs>

Bit 0 - Oversampler Enable This bit is set and cleared by software. Note: Software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing).

Source

pub fn ovsr(&mut self) -> OVSR_W<'_, CFGR2rs>

Bits 2:4 - Oversampling ratio This bit filed defines the number of oversampling ratio. Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing).

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pub fn ovss(&mut self) -> OVSS_W<'_, CFGR2rs>

Bits 5:8 - Oversampling shift This bit is set and cleared by software. Others: Reserved Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing).

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pub fn tovs(&mut self) -> TOVS_W<'_, CFGR2rs>

Bit 9 - Triggered Oversampling This bit is set and cleared by software. Note: The software is allowed to write this bit only when ADSTART=0 (which ensures that no conversion is ongoing).

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pub fn lftrig(&mut self) -> LFTRIG_W<'_, CFGR2rs>

Bit 29 - Low frequency trigger mode enable This bit is set and cleared by software. Note: The software is allowed to write this bit only when ADSTART bit is cleared to 0 (this ensures that no conversion is ongoing).

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pub fn ckmode(&mut self) -> CKMODE_W<'_, CFGR2rs>

Bits 30:31 - ADC clock mode These bits are set and cleared by software to define how the analog ADC is clocked: In all synchronous clock modes, there is no jitter in the delay from a timer trigger to the start of a conversion. Note: The software is allowed to write these bits only when the ADC is disabled (ADCAL=0, ADSTART=0, ADSTP=0, ADDIS=0 and ADEN=0).