Struct stm32g0::stm32g0c1::tim2::cr1::UDIS_W

pub struct UDIS_W<'a> { /* fields omitted */ }

Field UDIS writer - Update disable This bit is set and cleared by software to enable/disable UEV event generation. Counter overflow/underflow Setting the UG bit Update generation through the slave mode controller Buffered registers are then loaded with their preload values.

Implementations

impl<'a> UDIS_W<'a>

pub fn variant(self, variant: UDIS_A) -> &'a mut W

Writes variant to the field

pub fn b_0x0(self) -> &'a mut W

UEV enabled. The Update (UEV) event is generated by one of the following events:

pub fn b_0x1(self) -> &'a mut W

UEV disabled. The Update event is not generated, shadow registers keep their value (ARR, PSC, CCRx). However the counter and the prescaler are reinitialized if the UG bit is set or if a hardware reset is received from the slave mode controller.

pub fn set_bit(self) -> &'a mut W

Sets the field bit

pub fn clear_bit(self) -> &'a mut W

Clears the field bit

pub fn bit(self, value: bool) -> &'a mut W

Writes raw bits to the field