Struct stm32g0::stm32g0c1::tim1::cr2::MMS2_W

pub struct MMS2_W<'a> { /* fields omitted */ }

Field MMS2 writer - Master mode selection 2 These bits allow the information to be sent to ADC for synchronization (TRGO2) to be selected. The combination is as follows: Note: The clock of the slave timer or ADC must be enabled prior to receive events from the master timer, and must not be changed on-the-fly while triggers are received from the master timer.

Implementations

impl<'a> MMS2_W<'a>

pub fn variant(self, variant: MMS2_A) -> &'a mut W

Writes variant to the field

pub fn b_0x0(self) -> &'a mut W

Reset - the UG bit from the TIMx_EGR register is used as trigger output (TRGO2). If the reset is generated by the trigger input (slave mode controller configured in reset mode), the signal on TRGO2 is delayed compared to the actual reset.

pub fn b_0x1(self) -> &'a mut W

Enable - the Counter Enable signal CNT_EN is used as trigger output (TRGO2). It is useful to start several timers at the same time or to control a window in which a slave timer is enabled. The Counter Enable signal is generated by a logic AND between the CEN control bit and the trigger input when configured in Gated mode. When the Counter Enable signal is controlled by the trigger input, there is a delay on TRGO2, except if the Master/Slave mode is selected (see the MSM bit description in TIMx_SMCR register).

pub fn b_0x2(self) -> &'a mut W

Update - the update event is selected as trigger output (TRGO2). For instance, a master timer can then be used as a prescaler for a slave timer.

pub fn b_0x3(self) -> &'a mut W

Compare pulse - the trigger output sends a positive pulse when the CC1IF flag is to be set (even if it was already high), as soon as a capture or compare match occurs (TRGO2).

pub fn b_0x4(self) -> &'a mut W

Compare - OC1REFC signal is used as trigger output (TRGO2)

pub fn b_0x5(self) -> &'a mut W

Compare - OC2REFC signal is used as trigger output (TRGO2)

pub fn b_0x6(self) -> &'a mut W

Compare - OC3REFC signal is used as trigger output (TRGO2)

pub fn b_0x7(self) -> &'a mut W

Compare - OC4REFC signal is used as trigger output (TRGO2)

pub fn b_0x8(self) -> &'a mut W

Compare - OC5REFC signal is used as trigger output (TRGO2)

pub fn b_0x9(self) -> &'a mut W

Compare - OC6REFC signal is used as trigger output (TRGO2)

pub fn b_0x_a(self) -> &'a mut W

Compare Pulse - OC4REFC rising or falling edges generate pulses on TRGO2

pub fn b_0x_b(self) -> &'a mut W

Compare Pulse - OC6REFC rising or falling edges generate pulses on TRGO2

pub fn b_0x_c(self) -> &'a mut W

Compare Pulse - OC4REFC or OC6REFC rising edges generate pulses on TRGO2

pub fn b_0x_d(self) -> &'a mut W

Compare Pulse - OC4REFC rising or OC6REFC falling edges generate pulses on TRGO2

pub fn b_0x_e(self) -> &'a mut W

Compare Pulse - OC5REFC or OC6REFC rising edges generate pulses on TRGO2

pub fn b_0x_f(self) -> &'a mut W

Compare Pulse - OC5REFC rising or OC6REFC falling edges generate pulses on TRGO2

pub fn bits(self, value: u8) -> &'a mut W

Writes raw bits to the field