Struct stm32g0::stm32g0b0::usart1::cr3::CTSE_W [−][src]
pub struct CTSE_W<'a> { /* fields omitted */ }
Expand description
Field CTSE
writer - CTS enable This bit can only be written when the USART is disabled (UEÂ =Â 0) Note: If the hardware flow control feature is not supported, this bit is reserved and must be kept at reset value. Refer to .
Implementations
CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0). If the nCTS input is deasserted while data is being transmitted, then the transmission is completed before stopping. If data is written into the data register while nCTS is asserted, the transmission is postponed until nCTS is asserted.