Struct stm32g0::stm32g0b0::usart1::cr2::CPHA_R

pub struct CPHA_R(_);

Field CPHA reader - Clock phase This bit is used to select the phase of the clock output on the SCLK pin in synchronous mode. It works in conjunction with the CPOL bit to produce the desired clock/data relationship (see and ) This bit can only be written when the USART is disabled (UEÂ =Â 0). Note: If synchronous mode is not supported, this bit is reserved and must be kept at reset value. Refer to .

Implementations

impl CPHA_R

pub fn variant(&self) -> CPHA_A

Get enumerated values variant

pub fn is_b_0x0(&self) -> bool

Checks if the value of the field is B_0X0

pub fn is_b_0x1(&self) -> bool

Checks if the value of the field is B_0X1

Methods from Deref<Target = FieldReader<bool, CPHA_A>>

pub fn bits(&self) -> U

Reads raw bits from field.

pub fn bit(&self) -> bool

Value of the field as raw bits.

pub fn bit_is_clear(&self) -> bool

Returns true if the bit is clear (0).

pub fn bit_is_set(&self) -> bool

Returns true if the bit is set (1).

Trait Implementations

impl Deref for CPHA_R

type Target = FieldReader<bool, CPHA_A>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.