Struct stm32g0::stm32g0b0::tim1::bdtr::MOE_W

pub struct MOE_W<'a> { /* fields omitted */ }

Field MOE writer - Main output enable This bit is cleared asynchronously by hardware as soon as one of the break inputs is active (BRK or BRK2). It is set by software or automatically depending on the AOE bit. It is acting only on the channels which are configured in output. In response to a break event or if MOE is written to 0: OC and OCN outputs are disabled or forced to idle state depending on the OSSI bit. See OC/OCN enable description for more details (enable register (TIM1_CCERTIMx_CCER)N/A).

Implementations

impl<'a> MOE_W<'a>

pub fn variant(self, variant: MOE_A) -> &'a mut W

Writes variant to the field

pub fn b_0x0(self) -> &'a mut W

In response to a break 2 event. OC and OCN outputs are disabled

pub fn b_0x1(self) -> &'a mut W

OC and OCN outputs are enabled if their respective enable bits are set (CCxE, CCxNE in TIMx_CCER register).

pub fn set_bit(self) -> &'a mut W

Sets the field bit

pub fn clear_bit(self) -> &'a mut W

Clears the field bit

pub fn bit(self, value: bool) -> &'a mut W

Writes raw bits to the field