Struct stm32g0::stm32g081::lptim1::RegisterBlock[−][src]

#[repr(C)]pub struct RegisterBlock {
    pub isr: Reg<ISR_SPEC>,
    pub icr: Reg<ICR_SPEC>,
    pub ier: Reg<IER_SPEC>,
    pub cfgr: Reg<CFGR_SPEC>,
    pub cr: Reg<CR_SPEC>,
    pub cmp: Reg<CMP_SPEC>,
    pub arr: Reg<ARR_SPEC>,
    pub cnt: Reg<CNT_SPEC>,
    pub cfgr2: Reg<CFGR2_SPEC>,
    // some fields omitted
}

Expand description

Register block

Fields

isr: Reg<ISR_SPEC>

0x00 - Interrupt and Status Register

icr: Reg<ICR_SPEC>

0x04 - Interrupt Clear Register

ier: Reg<IER_SPEC>

0x08 - Interrupt Enable Register

cfgr: Reg<CFGR_SPEC>

0x0c - Configuration Register

cr: Reg<CR_SPEC>

0x10 - Control Register

cmp: Reg<CMP_SPEC>

0x14 - Compare Register

arr: Reg<ARR_SPEC>

0x18 - Autoreload Register

cnt: Reg<CNT_SPEC>

0x1c - Counter Register

cfgr2: Reg<CFGR2_SPEC>

0x24 - LPTIM configuration register 2

Auto Trait Implementations

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations

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T: 'static + ?Sized,

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